Generated by: CheckIt report Date : 28-Feb-2003 Time : 02h:07m Comments : Comments Customer : customer Technician : technician
ACPI APM Bios Adaptec AHA-154x compatible adapter BIOS CMOS CPU Cache DMI Floppy Hard disk(s) ISA Bus Keyboard MPEG Memory Mice Modems Network Option ROM(s) PC Speaker PCI BIOS PCMCIA PIC Parallel Ports Platform Plug'n'Play Resource Maps SMBus Serial Ports Sound Video system Y2K Compliance
CheckIt report
Plug'n'Play |
|---|
Plug'n'Play ================================================================================ Plug & Play Installation Check Results -------------------------------------------------------------------------------- Version of PnP BIOS specification : 1.0 Checksum : 48h(valid) Event notification is : not supported Event notification flag address : 00000400h PnP BIOS Real Mode API -------------------------------------------------------------------------------- Physical address of entry point : F000:9ADEh Data segment base address : 0040h PnP BIOS 16-Bit Protected Mode API -------------------------------------------------------------------------------- PM segment base address : 000F0000h PM offset to entry point : 9AFCh Data segment base address : 00000400h |
Docking Station |
|---|
Docking Station Information ================================================================================ System doesn't support docking! |
System Device List |
|---|
PnP BIOS Supports System Device Enumeration ================================================================================ Number of System device nodes : 18 System device node maximum size : 222 |
Motherboard registers |
|---|
Id : PNP0C02 (Motherboard registers) Handle : 0h Base Class : 08h (Generic System Peripheral) SubClass : 80h (Other system periheral) Interface : 00h (Other system periheral) Currently Assigned System Resources ================================================================================ Memory Range : FFF00000h - FFFFFFFFh I/O Range : 0010h - 001Fh I/O Range : 0024h - 0025h I/O Range : 0028h - 0029h I/O Range : 002Ch - 002Dh I/O Range : 0030h - 0031h I/O Range : 0034h - 0035h I/O Range : 0038h - 0039h I/O Range : 003Ch - 003Dh I/O Range : 0050h - 0053h I/O Range : 0072h - 0073h I/O Range : 0074h - 0075h I/O Range : 0076h - 0077h I/O Range : 0080h - 0080h I/O Range : 0090h - 0091h I/O Range : 0092h - 0092h I/O Range : 0093h - 009Fh I/O Range : 00A4h - 00A5h I/O Range : 00A8h - 00A9h I/O Range : 00ACh - 00ADh I/O Range : 00B0h - 00B1h I/O Range : 00B2h - 00B3h I/O Range : 00B4h - 00B5h I/O Range : 00B8h - 00B9h I/O Range : 00BCh - 00BDh Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0010h Maximum base I/O address : 0010h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 10h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0024h Maximum base I/O address : 0024h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0028h Maximum base I/O address : 0028h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 002Ch Maximum base I/O address : 002Ch Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0030h Maximum base I/O address : 0030h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0034h Maximum base I/O address : 0034h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0038h Maximum base I/O address : 0038h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 003Ch Maximum base I/O address : 003Ch Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0050h Maximum base I/O address : 0050h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 04h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0072h Maximum base I/O address : 0072h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0074h Maximum base I/O address : 0074h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0076h Maximum base I/O address : 0076h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0080h Maximum base I/O address : 0080h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 01h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0090h Maximum base I/O address : 0090h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0092h Maximum base I/O address : 0092h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 01h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0093h Maximum base I/O address : 0093h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 0Dh I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00A4h Maximum base I/O address : 00A4h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00A8h Maximum base I/O address : 00A8h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00ACh Maximum base I/O address : 00ACh Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00B0h Maximum base I/O address : 00B0h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00B2h Maximum base I/O address : 00B2h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00B4h Maximum base I/O address : 00B4h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00B8h Maximum base I/O address : 00B8h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00BCh Maximum base I/O address : 00BCh Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FFF00000h Range length : 00100000h bytes Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
System Board |
|---|
Id : PNP0C01 (System Board) Handle : 1h Base Class : 05h (Memory Controller) SubClass : 00h (RAM Controller) Interface : 00h (RAM Controller) Currently Assigned System Resources ================================================================================ Memory Range : 00000000h - 0009FFFFh Memory Range : 000E4000h - 000FFFFFh Memory Range : 00100000h - 0FDFFFFFh Allocated resource configuration descriptor block ================================================================================ 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Writeable Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : 00000000h Range length : 000A0000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : Yes Memory is Expansion ROM : Yes Base memory address : 000E4000h Range length : 0001C000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : 00100000h Range length : 0FD00000h bytes Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
AT DMA Controller |
|---|
Id : PNP0200 (AT DMA Controller) Handle : 2h Base Class : 08h (Generic System Peripheral) SubClass : 01h (DMA Controller) Interface : 01h (ISA DMA Controller) Currently Assigned System Resources ================================================================================ I/O Range : 0000h - 000Fh I/O Range : 0081h - 008Fh I/O Range : 00C0h - 00DFh DMA Channel : 4 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0000h Maximum base I/O address : 0000h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 10h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0081h Maximum base I/O address : 0081h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 0Fh I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00C0h Maximum base I/O address : 00C0h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 20h DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 4 Transfer type preference : 8- and 16-bit Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
AT Interrupt Controller |
|---|
Id : PNP0000 (AT Interrupt Controller) Handle : 3h Base Class : 08h (Generic System Peripheral) SubClass : 00h (PIC) Interface : 01h (ISA PIC) Currently Assigned System Resources ================================================================================ I/O Range : 0020h - 0021h I/O Range : 00A0h - 00A1h IRQ Channel : 02 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0020h Maximum base I/O address : 0020h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00A0h Maximum base I/O address : 00A0h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 2 Driven IRQ types : High true edge sensitive Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
AT Timer |
|---|
Id : PNP0100 (AT Timer) Handle : 4h Base Class : 08h (Generic System Peripheral) SubClass : 02h (System timer) Interface : 01h (ISA System Timer) Currently Assigned System Resources ================================================================================ I/O Range : 0040h - 0043h IRQ Channel : 00 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0040h Maximum base I/O address : 0040h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 04h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 0 Driven IRQ types : High true edge sensitive Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
AT Real-Time Clock |
|---|
Id : PNP0B00 (AT Real-Time Clock) Handle : 5h Base Class : 08h (Generic System Peripheral) SubClass : 03h (RTC Controller) Interface : 01h (ISA RTC controller) Currently Assigned System Resources ================================================================================ I/O Range : 0070h - 0071h IRQ Channel : 08 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0070h Maximum base I/O address : 0070h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 8 Driven IRQ types : High true edge sensitive Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
IBM Enhanced keyboard controller (101/2-key) |
|---|
Id : PNP0303 (IBM Enhanced keyboard controller (101/2-key)) Handle : 6h Base Class : 09h (Input Device) SubClass : 00h (Keyboard Controller) Interface : 00h (Keyboard Controller) Currently Assigned System Resources ================================================================================ I/O Range : 0060h - 0060h I/O Range : 0064h - 0064h IRQ Channel : 01 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0060h Maximum base I/O address : 0060h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 01h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0064h Maximum base I/O address : 0064h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 01h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 1 Driven IRQ types : High true edge sensitive Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
Math Coprocessor |
|---|
Id : PNP0C04 (Math Coprocessor) Handle : 7h Base Class : 0Bh (Processor) SubClass : 80h (Unknown) Interface : 00h (Unknown) Currently Assigned System Resources ================================================================================ I/O Range : 00F0h - 00FFh IRQ Channel : 13 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 00F0h Maximum base I/O address : 00F0h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 10h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 13 Driven IRQ types : High true edge sensitive Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
AT standard speaker sound |
|---|
Id : PNP0800 (AT standard speaker sound) Handle : 8h Base Class : 04h (Multimedia Device) SubClass : 01h (Audio Device) Interface : 00h (Audio Device) Currently Assigned System Resources ================================================================================ I/O Range : 0061h - 0061h Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0061h Maximum base I/O address : 0061h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 01h Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
Motherboard registers |
|---|
Id : PNP0C02 (Motherboard registers) Handle : 9h Base Class : 05h (Memory Controller) SubClass : 00h (RAM Controller) Interface : 00h (RAM Controller) Currently Assigned System Resources ================================================================================ Memory Range : 000DC000h - 000DFFFFh Allocated resource configuration descriptor block ================================================================================ 32-bit Memory Range Descriptor -------------------------------------------------------------------------------- Write status : Writeable Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Minimum base memory address : 000DC000h Maximum base memory address : 000DC000h Base alignment : 00004000h Range length : 00004000h bytes Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
PCI Bus |
|---|
Id : PNP0A03 (PCI Bus) Handle : Ah Base Class : 06h (Bridge Device) SubClass : 04h (PCI-to-PCI Bridge) Interface : 00h (PCI-to-PCI Bridge) Currently Assigned System Resources ================================================================================ I/O Range : 0CF8h - 0CFFh Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0CF8h Maximum base I/O address : 0CF8h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 08h Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
Motherboard registers |
|---|
Id : PNP0C02 (Motherboard registers) Handle : Bh Base Class : 06h (Bridge Device) SubClass : 01h (ISA Bridge) Interface : 00h (ISA Bridge) Currently Assigned System Resources ================================================================================ I/O Range : 04D0h - 04D1h I/O Range : 1000h - 105Fh I/O Range : 1060h - 107Fh I/O Range : 1180h - 11BFh Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 04D0h Maximum base I/O address : 04D0h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 02h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 1000h Maximum base I/O address : 1000h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 60h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 1060h Maximum base I/O address : 1060h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 20h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 1180h Maximum base I/O address : 1180h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 40h Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
INT0800 |
|---|
Id : INT0800 (info unavailable) Handle : Ch Base Class : 05h (Memory Controller) SubClass : 01h (Flash Memory Controller) Interface : 00h (Flash Memory Controller) Currently Assigned System Resources ================================================================================ Memory Range : FFB80000h - FFBFFFFFh Memory Range : FFB00000h - FFB7FFFFh Memory Range : FFA80000h - FFAFFFFFh Memory Range : FFA00000h - FFA7FFFFh Memory Range : FF980000h - FF9FFFFFh Memory Range : FF900000h - FF97FFFFh Memory Range : FF880000h - FF8FFFFFh Memory Range : FF800000h - FF87FFFFh Memory Range : FF000000h - FF07FFFFh Allocated resource configuration descriptor block ================================================================================ 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FFB80000h Range length : 00080000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FFB00000h Range length : 00080000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FFA80000h Range length : 00080000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FFA00000h Range length : 00080000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FF980000h Range length : 00080000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FF900000h Range length : 00080000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FF880000h Range length : 00080000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FF800000h Range length : 00080000h bytes 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Base memory address : FF000000h Range length : 00080000h bytes Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
Motherboard registers |
|---|
Id : PNP0C02 (Motherboard registers) Handle : Dh Base Class : 05h (Memory Controller) SubClass : 00h (RAM Controller) Interface : 00h (RAM Controller) Currently Assigned System Resources ================================================================================ Memory Range : 000D8000h - 000DBFFFh Allocated resource configuration descriptor block ================================================================================ 32-bit Memory Range Descriptor -------------------------------------------------------------------------------- Write status : Writeable Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : No Memory is Expansion ROM : No Minimum base memory address : 000D8000h Maximum base memory address : 000D8000h Base alignment : 00004000h Range length : 00004000h bytes Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
Motherboard registers |
|---|
Id : PNP0C02 (Motherboard registers) Handle : Fh Base Class : 05h (Memory Controller) SubClass : 00h (RAM Controller) Interface : 00h (RAM Controller) Currently Assigned System Resources ================================================================================ Memory Range : 000CF000h - 000CFFFFh Allocated resource configuration descriptor block ================================================================================ 32-bit Fixed Location Mem Range Descr. -------------------------------------------------------------------------------- Write status : Non-writeable (ROM) Cache support type : Non-cacheable Support type : Decode supports range length Memory control : 8-bit memory only Memory shadowable : Yes Memory is Expansion ROM : No Base memory address : 000CF000h Range length : 00001000h bytes Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : Yes Device is not configurable : Yes Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at next boot only (static) |
PC standard floppy disk controller |
|---|
Id : PNP0700 (PC standard floppy disk controller) Handle : 10h Base Class : 01h (Mass Storage Controller) SubClass : 02h (Floppy Disk Controller) Interface : 00h (Floppy Disk Controller) Currently Assigned System Resources ================================================================================ I/O Range : 03F0h - 03F5h I/O Range : 03F7h - 03F7h IRQ Channel : 06 DMA Channel : 2 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03F0h Maximum base I/O address : 03F0h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 06h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03F7h Maximum base I/O address : 03F7h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 01h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 6 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 2 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Possible resource configuration descriptor block ================================================================================ Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03F0h Maximum base I/O address : 03F0h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 06h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03F7h Maximum base I/O address : 03F7h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 01h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 6 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 2 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0370h Maximum base I/O address : 0370h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 06h I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0377h Maximum base I/O address : 0377h Alignment for minimum base addr. : 01h Number of contiguous I/O ports : 01h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 6 Driven IRQ types : High true edge sensitive DMA Format -------------------------------------------------------------------------------- Possible DMA Channels : 2 Transfer type preference : 8-bit only Bus Master mode supported : No Word mode supported : No Byte mode supported : No Channel speed mode : Compatible End Dependent Functions -------------------------------------------------------------------------------- Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : No Device is not configurable : No Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : Yes Device is: a) a docking station device : No b) a removable system device : No Device can be configured at runtime (dynamically) |
PS/2 Port for PS/2-style Mice |
|---|
Id : PNP0F13 (PS/2 Port for PS/2-style Mice) Handle : 12h Base Class : 09h (Input Device) SubClass : 02h (Mouse Controller) Interface : 00h (Mouse Controller) Currently Assigned System Resources ================================================================================ IRQ Channel : 12 Allocated resource configuration descriptor block ================================================================================ IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 12 Driven IRQ types : High true edge sensitive Possible resource configuration descriptor block ================================================================================ IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 12 Driven IRQ types : High true edge sensitive Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : No Device is not configurable : No Device is capable of being: a) primary output device : No b) primary input device : Yes c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at runtime (dynamically) |
Standard LPT printer port |
|---|
Id : PNP0400 (Standard LPT printer port) Handle : 15h Base Class : 07h (Simple Communication Controller) SubClass : 01h (Parallel Port) Interface : 01h (Bidirectional Parallel Port) Currently Assigned System Resources ================================================================================ I/O Range : 0378h - 037Fh IRQ Channel : 07 Allocated resource configuration descriptor block ================================================================================ I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0378h Maximum base I/O address : 0378h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 7 Driven IRQ types : High true edge sensitive Possible resource configuration descriptor block ================================================================================ Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0378h Maximum base I/O address : 0378h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 7 Driven IRQ types : High true edge sensitive Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0378h Maximum base I/O address : 0378h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 5 Driven IRQ types : High true edge sensitive Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0278h Maximum base I/O address : 0278h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 7 Driven IRQ types : High true edge sensitive Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 0278h Maximum base I/O address : 0278h Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 08h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 5 Driven IRQ types : High true edge sensitive Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03BCh Maximum base I/O address : 03BCh Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 04h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 7 Driven IRQ types : High true edge sensitive Start Dependent Functions -------------------------------------------------------------------------------- Priority : not present I/O Port Descriptor -------------------------------------------------------------------------------- Logical device decodes : Full 16 bit ISA address Minimum base I/O address : 03BCh Maximum base I/O address : 03BCh Alignment for minimum base addr. : 08h Number of contiguous I/O ports : 04h IRQ Format -------------------------------------------------------------------------------- Possible IRQs : 5 Driven IRQ types : High true edge sensitive End Dependent Functions -------------------------------------------------------------------------------- Device Attributes -------------------------------------------------------------------------------- Device can't be disabled : No Device is not configurable : No Device is capable of being: a) primary output device : No b) primary input device : No c) primary initial program load device : No Device is: a) a docking station device : No b) a removable system device : No Device can be configured at runtime (dynamically) |
PCI BIOS |
|---|
PCI (Peripheral Component Interconnect architecture): ================================================================================ Last PCI Bus Number in System...........2 Version................................ 2.10 Hardware Configuration mechanism....... 1 # 2 PCI buses Detected via PCI BIOS |
PCI IRQ Routing |
|---|
PCI IRQ Routing Information Table
================================================================================
IRQ Channels permanently dedicated to PCI: None
Device Slot Number : 0 (Motherboard device)
Function 0 is not configured on any IRQ channel
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 00h:1Eh:0h (PCI-to-PCI Bridge)
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTB# Link value : 61h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTC# Link value : 62h ( Connected to PIC)
INTC# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTD# Link value : 63h ( Connected to PIC)
INTD# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
Device Slot Number : 0 (Motherboard device)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : FFh:01h:0h (Empty)
INTA# Link value : 61h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 10
INTB# Link value : 0h (Not Connected to PIC)
INTB# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
Device Slot Number : 0 (Motherboard device)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : FFh:04h:0h (Empty)
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 10
INTB# Link value : 61h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 10
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
Device Slot Number : 0 (Motherboard device)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : FFh:00h:0h (Empty)
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 10
INTB# Link value : 0h (Not Connected to PIC)
INTB# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
Device Slot Number : 0 (Motherboard device)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : FFh:02h:0h (Empty)
INTA# Link value : 62h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 11
INTB# Link value : 63h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 11
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
Device Slot Number : 0 (Motherboard device)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : FFh:06h:0h (Empty)
INTA# Link value : 62h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 11
INTB# Link value : 63h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 11
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
Device Slot Number : 0 (Motherboard device)
Function 0 is not configured on any IRQ channel
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 00h:00h:0h (Host Bridge)
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTB# Link value : 61h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTC# Link value : 62h ( Connected to PIC)
INTC# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTD# Link value : 63h ( Connected to PIC)
INTD# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
Device Slot Number : 0 (Motherboard device)
Function 0 is not configured on any IRQ channel
Function 1 is not configured on any IRQ channel
Function 3 configured on IRQ channel 10 (INTB#)
Function 5 configured on IRQ channel 10 (INTB#)
Function 6 configured on IRQ channel 10 (INTB#)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 00h:1Fh:0h (ISA Bridge)
INTA# Link value : 62h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 11
INTB# Link value : 61h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 10
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
Device Slot Number : 0 (Motherboard device)
Function 0 configured on IRQ channel 10 (INTA#)
Function 1 configured on IRQ channel 11 (INTB#)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 00h:1Dh:0h (USB)
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 10
INTB# Link value : 63h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 11
INTC# Link value : 62h ( Connected to PIC)
INTC# IRQ Connectivity bitmap : 11
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
Device Slot Number : 0 (Motherboard device)
Function 0 is not configured on any IRQ channel
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : 00h:01h:0h (PCI-to-PCI Bridge)
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTB# Link value : 61h ( Connected to PIC)
INTB# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
Device Slot Number : 0 (Motherboard device)
--------------------------------------------------------------------------------
PCI Device (Bus:Device:Func.) : FFh:00h:0h (Empty)
INTA# Link value : 60h ( Connected to PIC)
INTA# IRQ Connectivity bitmap : 10
INTB# Link value : 0h (Not Connected to PIC)
INTB# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTC# Link value : 0h (Not Connected to PIC)
INTC# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
INTD# Link value : 0h (Not Connected to PIC)
INTD# IRQ Connectivity bitmap : 3,4,5,6,7,9,10,11,12,14,15
Note: Any of INTx# lines whose link values are
identical are assumed to share the same
IRQ channel.
|
PCI Bus 00 |
|---|
PCI Bus 00 |
Host Bridge |
|---|
Host Bridge ================================================================================ PCI Device 0:0:0 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 1A30h (info unavailable) Revision ID : 05h Subsystem Vendor ID : 1179h (Toshiba America Info Systems) Subsystem Device ID : FF00h (info unavailable) Base class code : 06h (Bridge Device) Sub-class code : 00h (Host Bridge) Programming interface : 00h (Host Bridge) Base Address Registers: ----------------------------------------------------- BAR Type Base Size Comments ----------------------------------------------------- 0 Mem E0000000h 10000000h 256 MB. 32 bit. Prefetchable. Locate anywhere in 32 bit address space Command register : 06h -------------------------------------------------------------------------------- I/O space access : disabled Memory space access : enabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : enabled Fast back-to-back transaction : disabled Device Status Register : 90h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : fast Signalled Target Abort : No Received Target Abort : No Received Master Abort : Yes Signalled System Error : No Detected parity error : No New Capabilities Linked List is available AGP capability ID found Revision : 2.0 Data transfer rates : 1x 2x FM Transfer : supported Address greater than 4 GB : not supported Sideband addressing : supported Maximum command queue depth : 32 Header Type : 00h (Device, Single) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 30 1A - 06 01 90 20 "..0.... " 0008: 05 00 00 06 - 00 00 00 00 "........" 0010: 08 00 00 E0 - 00 00 00 00 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 00 00 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 79 11 00 FF "....y..." 0030: 00 00 00 00 - E4 00 00 00 "........" 0038: 00 00 00 00 - 00 00 00 00 "........" 0040: 00 00 00 00 - 00 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 35 00 00 ".....5.." 0060: 04 08 08 08 - 08 08 08 08 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 22 00 00 00 - 00 00 00 00 ""......." 0078: 15 04 02 3C - 71 02 02 30 "... |
PCI-to-PCI Bridge |
|---|
PCI-to-PCI Bridge ================================================================================ PCI Device 0:1:0 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 1A31h (info unavailable) Revision ID : 05h Base class code : 06h (Bridge Device) Sub-class code : 04h (PCI-to-PCI Bridge) Programming interface : 00h (PCI-to-PCI Bridge) Bus Number Assignments -------------------------------------------------------------------------------- Primary bus number : 00h Secondary bus number : 01h Subordinate bus number : 01h Secondary bus latency timer : 64(40h) Secondary PCI-to-PCI status : 22A0h Subtracive Decoding Capable : No I/O Filter Base : 3000h I/O Filter Limit : 3FFFh I/O Address Decoding Type : 16-bit Memory Filter Base : D0100000h Memory Filter Limit : D01FFFFFh Address Decoding Type : 32-bit Prefetched Filter Base : 0D8000000h Prefetched Filter Limit : 0DFFFFFFFh Address Decoding Type : 32-bit Bridge Control register : 0Ch -------------------------------------------------------------------------------- VGA I/O address routing : enabled ISA I/O address routing : enabled CSERR# : disabled Parity Error responce : disabled Command register : 07h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : enabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : enabled Fast back-to-back transaction : disabled Device Status Register : A0h -------------------------------------------------------------------------------- Capable of running at 66MHz : Yes UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : fast Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 01h (PCI-to-PCI bridge, Single) Built-In Self-Test : No Cache Line Size : not specified Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 31 1A - 07 01 A0 00 "..1....." 0008: 05 00 04 06 - 00 60 01 00 ".....`.." 0010: 00 00 00 00 - 00 00 00 00 "........" 0018: 00 01 01 40 - 30 30 A0 22 "...@00."" 0020: 10 D0 10 D0 - 00 D8 F0 DF "........" 0028: 00 00 00 00 - 00 00 00 00 "........" 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 00 00 0C 00 "........" 0040: 00 00 00 00 - 00 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: EC 8A FF 6F - 22 F4 09 00 "...o"..." 0058: D4 95 FF CF - 44 F4 01 00 "....D..." 0060: 01 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 00 00 00 00 - 00 00 00 00 "........" |
PCI Multifunctional device |
|---|
PCI Multifunctional device ================================================================================ Function 0: info unavailable Function 1: info unavailable |
USB |
|---|
UHCI - Universal Host Controller Specification ================================================================================ PCI Device 0:1D:0 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 2482h (info unavailable) Revision ID : 02h Subsystem Vendor ID : 1179h (Toshiba America Info Systems) Subsystem Device ID : FF00h (info unavailable) Base class code : 0Ch (Serial Bus Controller) Sub-class code : 03h (USB) Programming interface : 00h (UHCI - Universal Host Controller Specification) Base Address Registers: ----------------------------------------------------- BAR Type Base Size Comments ----------------------------------------------------- 4 I/O 00002400h 00000020h 32 B. Interrupt Pin : INTA# Interrupt Line : IRQ10 Command register : 05h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : disabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 80h (Device, Multiple functions) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 82 24 - 05 00 80 02 "...$...." 0008: 02 00 03 0C - 00 00 80 00 "........" 0010: 00 00 00 00 - 00 00 00 00 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 01 24 00 00 - 00 00 00 00 ".$......" 0028: 00 00 00 00 - 79 11 00 FF "....y..." 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 0A 01 00 00 "........" 0040: 00 00 00 00 - 00 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 10 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 3B 00 00 00 - 00 00 00 00 ";......." 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 47 0F 00 00 - 00 00 00 00 "G......." |
USB |
|---|
UHCI - Universal Host Controller Specification ================================================================================ PCI Device 0:1D:1 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 2484h (info unavailable) Revision ID : 02h Subsystem Vendor ID : 1179h (Toshiba America Info Systems) Subsystem Device ID : FF00h (info unavailable) Base class code : 0Ch (Serial Bus Controller) Sub-class code : 03h (USB) Programming interface : 00h (UHCI - Universal Host Controller Specification) Base Address Registers: ----------------------------------------------------- BAR Type Base Size Comments ----------------------------------------------------- 4 I/O 00002420h 00000020h 32 B. Interrupt Pin : INTB# Interrupt Line : IRQ11 Command register : 05h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : disabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 00h (Device, Single) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 84 24 - 05 00 80 02 "...$...." 0008: 02 00 03 0C - 00 00 00 00 "........" 0010: 00 00 00 00 - 00 00 00 00 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 21 24 00 00 - 00 00 00 00 "!$......" 0028: 00 00 00 00 - 79 11 00 FF "....y..." 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 0B 02 00 00 "........" 0040: 00 00 00 00 - 00 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 10 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 10 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 47 0F 00 00 - 00 00 00 00 "G......." |
PCI-to-PCI Bridge |
|---|
PCI-to-PCI Bridge ================================================================================ PCI Device 0:1E:0 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 2448h (info unavailable) Revision ID : 42h Base class code : 06h (Bridge Device) Sub-class code : 04h (PCI-to-PCI Bridge) Programming interface : 00h (PCI-to-PCI Bridge) Bus Number Assignments -------------------------------------------------------------------------------- Primary bus number : 00h Secondary bus number : 02h Subordinate bus number : 02h Secondary bus latency timer : 64(40h) Secondary PCI-to-PCI status : 2280h Subtracive Decoding Capable : No I/O Filter Base : 4000h I/O Filter Limit : 4FFFh I/O Address Decoding Type : 16-bit Memory Filter Base : D0200000h Memory Filter Limit : D02FFFFFh Address Decoding Type : 32-bit Prefetched Filter : None-configured Bridge Control register : 04h -------------------------------------------------------------------------------- VGA I/O address routing : disabled ISA I/O address routing : enabled CSERR# : disabled Parity Error responce : disabled Command register : 07h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : enabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : enabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : fast Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 01h (PCI-to-PCI bridge, Single) Built-In Self-Test : No Cache Line Size : not specified Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 48 24 - 07 01 80 00 "..H$...." 0008: 42 00 04 06 - 00 00 01 00 "B......." 0010: 00 00 00 00 - 00 00 00 00 "........" 0018: 00 02 02 40 - 40 40 80 22 "...@@@."" 0020: 20 D0 20 D0 - F0 FF 00 00 " . ....." 0028: 00 00 00 00 - 00 00 00 00 "........" 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 00 00 04 00 "........" 0040: 02 28 20 20 - 00 00 00 00 ".( ...." 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 02 14 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 00 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 40 00 00 00 - 00 00 00 00 "@......." 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 10 00 08 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 01 00 02 00 - 00 00 C0 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 47 0F 00 00 - 00 00 62 3C "G.....b<" |
PCI Multifunctional device |
|---|
PCI Multifunctional device ================================================================================ Function 0: info unavailable Function 1: info unavailable Function 3: info unavailable Function 5: info unavailable Function 6: info unavailable |
ISA Bridge |
|---|
ISA Bridge ================================================================================ PCI Device 0:1F:0 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 248Ch (info unavailable) Revision ID : 02h Base class code : 06h (Bridge Device) Sub-class code : 01h (ISA Bridge) Programming interface : 00h (ISA Bridge) Command register : 0Fh -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : enabled Bus master : enabled Special cycles operations : monitor Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 80h (Device, Multiple functions) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 8C 24 - 0F 00 80 02 "...$...." 0008: 02 00 01 06 - 00 00 80 00 "........" 0010: 00 00 00 00 - 00 00 00 00 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 00 00 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 00 00 00 00 "........" 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 00 00 00 00 "........" 0040: 01 10 00 00 - 10 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 81 11 00 00 - 10 00 00 00 "........" 0060: 0A 0A 80 0B - 90 00 00 00 "........" 0068: 80 80 80 80 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: FF FC 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 20 03 00 00 - 00 00 00 00 " ......." 00A8: 0D 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 01 0A - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 02 28 00 00 - 02 0F 00 00 ".(......" 00D8: 04 00 00 00 - 00 00 00 00 "........" 00E0: 10 00 00 80 - 00 00 0C 00 "........" 00E8: 33 22 11 00 - 00 00 67 45 "3"....gE" 00F0: 0F 00 00 84 - 00 00 00 00 "........" 00F8: 47 0F 0F 00 - 00 00 01 00 "G......." |
IDE Controller |
|---|
IDE Controller ================================================================================ PCI Device 0:1F:1 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 248Ah (info unavailable) Revision ID : 02h Subsystem Vendor ID : 1179h (Toshiba America Info Systems) Subsystem Device ID : FF00h (info unavailable) Base class code : 01h (Mass Storage Controller) Sub-class code : 01h (IDE Controller) Programming interface : 8Ah (Master IDE Device) Base Address Registers: ----------------------------------------------------- BAR Type Base Size Comments ----------------------------------------------------- 0 I/O 00000000h 00000008h 8 B. 1 I/O 00000000h 00000004h 4 B. 2 I/O 00000000h 00000008h 8 B. 3 I/O 00000000h 00000004h 4 B. 4 I/O 00001800h 00000010h 16 B. Interrupt Pin : INTA# Interrupt Line : Not available Command register : 07h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : enabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 00h (Device, Single) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 8A 24 - 07 00 80 02 "...$...." 0008: 02 8A 01 01 - 00 00 00 00 "........" 0010: 01 00 00 00 - 01 00 00 00 "........" 0018: 01 00 00 00 - 01 00 00 00 "........" 0020: 01 18 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 79 11 00 FF "....y..." 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - FF 01 00 00 "........" 0040: 07 A3 03 A3 - 00 00 00 00 "........" 0048: 05 00 01 02 - 00 00 00 00 "........" 0050: 00 00 00 00 - 10 14 10 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 08 00 00 00 - 00 00 00 00 "........" 0068: 08 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 47 0F 00 00 - 00 00 00 00 "G......." |
SMBus |
|---|
SMBus ================================================================================ PCI Device 0:1F:3 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 2483h (info unavailable) Revision ID : 02h Subsystem Vendor ID : 1179h (Toshiba America Info Systems) Subsystem Device ID : FF00h (info unavailable) Base class code : 0Ch (Serial Bus Controller) Sub-class code : 05h (SMBus) Programming interface : 00h (SMBus) Base Address Registers: ----------------------------------------------------- BAR Type Base Size Comments ----------------------------------------------------- 4 I/O 00001820h 00000020h 32 B. Interrupt Pin : INTB# Interrupt Line : IRQ10 Command register : 01h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : disabled Bus master : disabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 00h (Device, Single) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 83 24 - 01 00 80 02 "...$...." 0008: 02 00 05 0C - 00 00 00 00 "........" 0010: 00 00 00 00 - 00 00 00 00 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 21 18 00 00 - 00 00 00 00 "!......." 0028: 00 00 00 00 - 79 11 00 FF "....y..." 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 0A 02 00 00 "........" 0040: 01 00 00 00 - 00 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 00 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 47 0F 00 00 - 00 00 00 00 "G......." |
Audio Device |
|---|
Audio Device ================================================================================ PCI Device 0:1F:5 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 2485h (info unavailable) Revision ID : 02h Subsystem Vendor ID : 1179h (Toshiba America Info Systems) Subsystem Device ID : FF00h (info unavailable) Base class code : 04h (Multimedia Device) Sub-class code : 01h (Audio Device) Programming interface : 00h (Audio Device) Base Address Registers: ----------------------------------------------------- BAR Type Base Size Comments ----------------------------------------------------- 0 I/O 00001C00h 00000100h 256 B. 1 I/O 00001840h 00000040h 64 B. Interrupt Pin : INTB# Interrupt Line : IRQ10 Command register : 01h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : disabled Bus master : disabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 00h (Device, Single) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 85 24 - 01 00 80 02 "...$...." 0008: 02 00 01 04 - 00 00 00 00 "........" 0010: 01 1C 00 00 - 41 18 00 00 "....A..." 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 00 00 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 79 11 00 FF "....y..." 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 0A 02 00 00 "........" 0040: 01 00 00 00 - 00 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 00 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 47 0F 00 00 - 00 00 00 00 "G......." |
Modem |
|---|
Generic modem ================================================================================ PCI Device 0:1F:6 (Hex) (Bus:Device:Function) Vendor ID : 8086h (Intel) Device ID : 2486h (info unavailable) Revision ID : 02h Subsystem Vendor ID : 1179h (Toshiba America Info Systems) Subsystem Device ID : 0001h (info unavailable) Base class code : 07h (Simple Communication Controller) Sub-class code : 03h (Modem) Programming interface : 00h (Generic modem) Base Address Registers: ----------------------------------------------------- BAR Type Base Size Comments ----------------------------------------------------- 0 I/O 00002000h 00000100h 256 B. 1 I/O 00001880h 00000080h 128 B. Interrupt Pin : INTB# Interrupt Line : IRQ10 Command register : 01h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : disabled Bus master : disabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : disabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 80h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : Yes Data parity error detected : No Device select timing : medium Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No Header Type : 00h (Device, Single) Built-In Self-Test : No Cache Line Size : not specified Device has no major requirements for the settings of Latency Timer Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 86 80 86 24 - 01 00 80 02 "...$...." 0008: 02 00 03 07 - 00 00 00 00 "........" 0010: 01 20 00 00 - 81 18 00 00 ". ......" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 00 00 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 79 11 01 00 "....y..." 0030: 00 00 00 00 - 00 00 00 00 "........" 0038: 00 00 00 00 - 0A 02 00 00 "........" 0040: 00 00 00 00 - 00 00 00 00 "........" 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 00 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: 00 00 00 00 - 00 00 00 00 "........" 0098: 00 00 00 00 - 00 00 00 00 "........" 00A0: 00 00 00 00 - 00 00 00 00 "........" 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 47 0F 00 00 - 00 00 00 00 "G......." |
PCI Bus 01 |
|---|
PCI Bus 01 |
VGA Device |
|---|
VGA Compatible Controller
================================================================================
PCI Device 1:0:0 (Hex) (Bus:Device:Function)
Vendor ID : 1002h (ATI Technologies)
Device ID : 4C59h (info unavailable)
Revision ID : 00h
Subsystem Vendor ID : 1179h (Toshiba America Info Systems)
Subsystem Device ID : FF00h (info unavailable)
Base class code : 03h (Display Controller)
Sub-class code : 00h (VGA Device)
Programming interface : 00h (VGA Compatible Controller)
Base Address Registers:
-----------------------------------------------------
BAR Type Base Size Comments
-----------------------------------------------------
0 Mem D8000000h 08000000h 128 MB. 32 bit. Prefetchable. Locate anywhere in 32 bit address space
1 I/O 00003000h 00000100h 256 B.
2 Mem D0100000h 00010000h 64 KB. 32 bit. Locate anywhere in 32 bit address space
Interrupt Pin : INTA#
Interrupt Line : IRQ10
================================================================================
*Warning: This device is absent in PCI IRQ Routing Table
================================================================================
Command register : 83h
--------------------------------------------------------------------------------
I/O space access : enabled
Memory space access : enabled
Bus master : disabled
Special cycles operations : ignore
Memory write and Invalidate : disabled
VGA palette snoop : disabled
Parity error response : disabled
Wait cycle control : enabled
System error line #SERR : enabled
Fast back-to-back transaction : enabled
Device Status Register : B0h
--------------------------------------------------------------------------------
Capable of running at 66MHz : Yes
UDF supported : No
Fast back-to-back Capable : Yes
Data parity error detected : No
Device select timing : medium
Signalled Target Abort : No
Received Target Abort : No
Received Master Abort : No
Signalled System Error : No
Detected parity error : No
New Capabilities Linked List is available
AGP capability ID found
Revision : 2.0
Data transfer rates : 1x 2x
FM Transfer : not supported
Address greater than 4 GB : not supported
Sideband addressing : supported
Maximum command queue depth : 48
PCI Power Management Interface capability ID found
Header Type : 00h (Device, Single)
Built-In Self-Test : No
Cache Line Size : 32 bytes
Desirable settings for Latency Timer values
MIN_GNT : 2000 nanosecs. (*)
MAX_LAT : 0 nanosecs. (*)
*) MIN_GNT - specify how long a burst period
the device needs assuming a clock
rate of 33 MHz)
MAX_LAT - specify how often the device needs
to gain access to the PCI bus)
Dump of PCI Configuration Space
--------------------------------------------------------------------------------
0000: 02 10 59 4C - 83 03 B0 02 "..YL...."
0008: 00 00 00 03 - 08 42 00 00 ".....B.."
0010: 08 00 00 D8 - 01 30 00 00 ".....0.."
0018: 00 00 10 D0 - 00 00 00 00 "........"
0020: 00 00 00 00 - 00 00 00 00 "........"
0028: 00 00 00 00 - 79 11 00 FF "....y..."
0030: 00 00 00 00 - 58 00 00 00 "....X..."
0038: 00 00 00 00 - 0A 01 08 00 "........"
0040: 00 00 00 00 - 00 00 00 00 "........"
0048: 00 00 00 00 - 79 11 00 FF "....y..."
0050: 01 00 02 06 - 00 00 00 00 "........"
0058: 02 50 20 00 - 07 02 00 2F ".P ..../"
0060: 00 02 00 00 - 00 00 00 00 "........"
0068: 00 00 00 00 - 00 00 00 00 "........"
0070: 00 00 00 00 - 00 00 00 00 "........"
0078: 00 00 00 00 - 00 00 00 00 "........"
0080: 00 00 00 00 - 00 00 00 00 "........"
0088: 00 00 00 00 - 00 00 00 00 "........"
0090: 00 00 00 00 - 00 00 00 00 "........"
0098: 00 00 00 00 - 00 00 00 00 "........"
00A0: 00 00 00 00 - 00 00 00 00 "........"
00A8: 00 00 00 00 - 00 00 00 00 "........"
00B0: 00 00 00 00 - 00 00 00 00 "........"
00B8: 00 00 00 00 - 00 00 00 00 "........"
00C0: 00 00 00 00 - 00 00 00 00 "........"
00C8: 00 00 00 00 - 00 00 00 00 "........"
00D0: 00 00 00 00 - 00 00 00 00 "........"
00D8: 00 00 00 00 - 00 00 00 00 "........"
00E0: 00 00 00 00 - 00 00 00 00 "........"
00E8: 00 00 00 00 - 00 00 00 00 "........"
00F0: 00 00 00 00 - 00 00 00 00 "........"
00F8: 00 00 00 00 - 00 00 00 00 "........"
|
PCI Bus 02 |
|---|
PCI Bus 02 |
Ethernet Controller |
|---|
RT8139 Fast Ethernet Adapter
Ethernet Controller
================================================================================
PCI Device 2:1:0 (Hex) (Bus:Device:Function)
Vendor ID : 10ECh (Realtek Semiconductor)
Device ID : 8139h (RT8139 Fast Ethernet Adapter)
Revision ID : 10h
Subsystem Vendor ID : 1179h (Toshiba America Info Systems)
Subsystem Device ID : FF00h (info unavailable)
Base class code : 02h (Network Controller)
Sub-class code : 00h (Ethernet Controller)
Programming interface : 00h (Ethernet Controller)
Base Address Registers:
-----------------------------------------------------
BAR Type Base Size Comments
-----------------------------------------------------
0 I/O 00004000h 00000100h 256 B.
1 Mem D0200000h 00000100h 256 B. 32 bit. Locate anywhere in 32 bit address space
Interrupt Pin : INTA#
Interrupt Line : IRQ10
================================================================================
*Warning: This device is absent in PCI IRQ Routing Table
================================================================================
Command register : 03h
--------------------------------------------------------------------------------
I/O space access : enabled
Memory space access : enabled
Bus master : disabled
Special cycles operations : ignore
Memory write and Invalidate : disabled
VGA palette snoop : disabled
Parity error response : disabled
Wait cycle control : disabled
System error line #SERR : enabled
Fast back-to-back transaction : disabled
Device Status Register : 90h
--------------------------------------------------------------------------------
Capable of running at 66MHz : No
UDF supported : No
Fast back-to-back Capable : Yes
Data parity error detected : No
Device select timing : medium
Signalled Target Abort : No
Received Target Abort : No
Received Master Abort : No
Signalled System Error : No
Detected parity error : No
New Capabilities Linked List is available
PCI Power Management Interface capability ID found
Header Type : 00h (Device, Single)
Built-In Self-Test : No
Cache Line Size : not specified
Desirable settings for Latency Timer values
MIN_GNT : 8000 nanosecs. (*)
MAX_LAT : 16000 nanosecs. (*)
*) MIN_GNT - specify how long a burst period
the device needs assuming a clock
rate of 33 MHz)
MAX_LAT - specify how often the device needs
to gain access to the PCI bus)
Dump of PCI Configuration Space
--------------------------------------------------------------------------------
0000: EC 10 39 81 - 03 01 90 02 "..9....."
0008: 10 00 00 02 - 00 40 00 00 ".....@.."
0010: 01 40 00 00 - 00 00 20 D0 ".@.... ."
0018: 00 00 00 00 - 00 00 00 00 "........"
0020: 00 00 00 00 - 00 00 00 00 "........"
0028: 00 00 00 00 - 79 11 00 FF "....y..."
0030: 00 00 00 00 - 50 00 00 00 "....P..."
0038: 00 00 00 00 - 0A 01 20 40 "...... @"
0040: 00 00 00 00 - 00 00 00 00 "........"
0048: 00 00 00 00 - 00 00 00 00 "........"
0050: 01 00 C2 F7 - 00 00 00 00 "........"
0058: 00 00 00 00 - 00 00 00 00 "........"
0060: 00 00 00 00 - 00 00 00 00 "........"
0068: 00 00 00 00 - 00 00 00 00 "........"
0070: 00 00 00 00 - 00 00 00 00 "........"
0078: 00 00 00 00 - 00 00 00 00 "........"
0080: 00 00 00 00 - 00 00 00 00 "........"
0088: 00 00 00 00 - 00 00 00 00 "........"
0090: 00 00 00 00 - 00 00 00 00 "........"
0098: 00 00 00 00 - 00 00 00 00 "........"
00A0: 00 00 00 00 - 00 00 00 00 "........"
00A8: 00 00 00 00 - 00 00 00 00 "........"
00B0: 00 00 00 00 - 00 00 00 00 "........"
00B8: 00 00 00 00 - 00 00 00 00 "........"
00C0: 00 00 00 00 - 00 00 00 00 "........"
00C8: 00 00 00 00 - 00 00 00 00 "........"
00D0: 00 00 00 00 - 00 00 00 00 "........"
00D8: 00 00 00 00 - 00 00 00 00 "........"
00E0: 00 00 00 00 - 00 00 00 00 "........"
00E8: 00 00 00 00 - 00 00 00 00 "........"
00F0: 00 00 00 00 - 00 00 00 00 "........"
00F8: 00 00 00 00 - 00 00 00 00 "........"
|
CardBus Bridge |
|---|
CardBus Bridge ================================================================================ Socket 0: info unavailable Socket 1: info unavailable |
Socket 0 |
|---|
CardBus Bridge ================================================================================ PCI Device 2:4:0 (Hex) (Bus:Device:Function) Vendor ID : 1217h (02 MICRO Inc) Device ID : 6933h (info unavailable) Revision ID : 01h Subsystem Vendor ID : 1179h (Toshiba America Info Systems) Subsystem Device ID : FF00h (info unavailable) Base class code : 06h (Bridge Device) Sub-class code : 07h (CardBus Bridge) Programming interface : 00h (CardBus Bridge) --------------------------------------------- Reg. Type Base Limit --------------------------------------------- 0 Mem 00000000h 00000000h 1 Mem 00000000h 00000000h 0 I/O 00000001h 00000001h 1 I/O 00000001h 00000001h PC Card 16-bit IF Legacy Mode Base Address : 000003E0h (I/O) Interrupt Pin : INTA# Interrupt Line : Not available Command register : 87h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : enabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : enabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 10h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : No Data parity error detected : No Device select timing : slow Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No New Capabilities Linked List is available Header Type : 82h (CardBus bridge, Multiple functions) Built-In Self-Test : No Cache Line Size : not specified PCI bus number : 0 CardBus Bus number : 0 Subordinate Bus Number : 0 Secondary status : 0200h CardBus Latency Timer : not specified Bridge Control : 0080h Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 17 12 33 69 - 87 00 10 04 "..3i...." 0008: 01 00 07 06 - 00 00 82 00 "........" 0010: 00 00 00 00 - A0 00 00 02 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 00 00 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 01 00 00 00 "........" 0030: 01 00 00 00 - 01 00 00 00 "........" 0038: 01 00 00 00 - 00 01 80 00 "........" 0040: 79 11 00 FF - E1 03 00 00 "y......." 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 00 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: BF 23 00 0C - CA 03 42 82 ".#....B." 0098: 00 00 50 20 - 00 00 00 00 "..P ...." 00A0: 01 00 02 FE - 00 40 C0 00 ".....@.." 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 00 00 00 00 - 00 00 00 00 "........" |
Socket 1 |
|---|
CardBus Bridge ================================================================================ PCI Device 2:4:1 (Hex) (Bus:Device:Function) Vendor ID : 1217h (02 MICRO Inc) Device ID : 6933h (info unavailable) Revision ID : 01h Subsystem Vendor ID : 1179h (Toshiba America Info Systems) Subsystem Device ID : FF00h (info unavailable) Base class code : 06h (Bridge Device) Sub-class code : 07h (CardBus Bridge) Programming interface : 00h (CardBus Bridge) --------------------------------------------- Reg. Type Base Limit --------------------------------------------- 0 Mem 00000000h 00000000h 1 Mem 00000000h 00000000h 0 I/O 00000001h 00000001h 1 I/O 00000001h 00000001h PC Card 16-bit IF Legacy Mode Base Address : 000003E0h (I/O) Interrupt Pin : INTB# Interrupt Line : Not available Command register : 87h -------------------------------------------------------------------------------- I/O space access : enabled Memory space access : enabled Bus master : enabled Special cycles operations : ignore Memory write and Invalidate : disabled VGA palette snoop : disabled Parity error response : disabled Wait cycle control : enabled System error line #SERR : disabled Fast back-to-back transaction : disabled Device Status Register : 10h -------------------------------------------------------------------------------- Capable of running at 66MHz : No UDF supported : No Fast back-to-back Capable : No Data parity error detected : No Device select timing : slow Signalled Target Abort : No Received Target Abort : No Received Master Abort : No Signalled System Error : No Detected parity error : No New Capabilities Linked List is available Header Type : 82h (CardBus bridge, Multiple functions) Built-In Self-Test : No Cache Line Size : not specified PCI bus number : 0 CardBus Bus number : 0 Subordinate Bus Number : 0 Secondary status : 0200h CardBus Latency Timer : not specified Bridge Control : 0080h Dump of PCI Configuration Space -------------------------------------------------------------------------------- 0000: 17 12 33 69 - 87 00 10 04 "..3i...." 0008: 01 00 07 06 - 00 00 82 00 "........" 0010: 00 00 00 00 - A0 00 00 02 "........" 0018: 00 00 00 00 - 00 00 00 00 "........" 0020: 00 00 00 00 - 00 00 00 00 "........" 0028: 00 00 00 00 - 01 00 00 00 "........" 0030: 01 00 00 00 - 01 00 00 00 "........" 0038: 01 00 00 00 - 00 02 80 00 "........" 0040: 79 11 00 FF - E1 03 00 00 "y......." 0048: 00 00 00 00 - 00 00 00 00 "........" 0050: 00 00 00 00 - 00 00 00 00 "........" 0058: 00 00 00 00 - 00 00 00 00 "........" 0060: 00 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 00 - 00 00 00 00 "........" 0070: 00 00 00 00 - 00 00 00 00 "........" 0078: 00 00 00 00 - 00 00 00 00 "........" 0080: 00 00 00 00 - 00 00 00 00 "........" 0088: 00 00 00 00 - 00 00 00 00 "........" 0090: BF 23 00 0C - CA 03 42 82 ".#....B." 0098: 00 00 50 20 - 00 00 00 00 "..P ...." 00A0: 01 00 02 FE - 00 40 C0 00 ".....@.." 00A8: 00 00 00 00 - 00 00 00 00 "........" 00B0: 00 00 00 00 - 00 00 00 00 "........" 00B8: 00 00 00 00 - 00 00 00 00 "........" 00C0: 00 00 00 00 - 00 00 00 00 "........" 00C8: 00 00 00 00 - 00 00 00 00 "........" 00D0: 00 00 00 00 - 00 00 00 00 "........" 00D8: 00 00 00 00 - 00 00 00 00 "........" 00E0: 00 00 00 00 - 00 00 00 00 "........" 00E8: 00 00 00 00 - 00 00 00 00 "........" 00F0: 00 00 00 00 - 00 00 00 00 "........" 00F8: 00 00 00 00 - 00 00 00 00 "........" |
Platform |
|---|
IBM PC/AT or compatible ================================================================================ Computer type code: -------------------------------------------------------------------------------- Model byte : FCh Submodel byte : 01h Revision byte : 00h System configuration byte description: -------------------------------------------------------------------------------- Second 8259 (PIC) installed Real-Time clock installed INT 15h (Function 4Fh) called upon INT 09h Extended BIOS area allocated System Parameters Table Dump: FBE0:0B48 -------------------------------------------------------------------------------- 0000: 08 00 FC 01 - 00 74 00 00 ".....t.." |
Network |
|---|
Network Adapter(s) Found: ================================================================================ 1. RT8139 Fast Ethernet Adapter |
RT8139 Fast Ethernet Adapter |
|---|
PCI network adapter ================================================================================ Location : PCI Device on Motherboard Vendor Id : 10ECh (Realtek Semiconductor) Device Id : 8139h (RT8139 Fast Ethernet Adapter) Class : 00h (Ethernet Controller) Sub Vendor Id : 1179h (Toshiba America Info Systems) Sub Device Id : FF00h (info unavailable) |
APM Bios |
|---|
APM Bios ================================================================================ APM BIOS version 1.2 is enabled Real mode API supported via INT 15 32-bit protected mode API supported -------------------------------------------------------------------------------- Physical address of entry point : F000:00005896 Physical data segment : F000 Code segment limit : FFFFh Data segment limit : FFFFh 16-bit protected mode API supported -------------------------------------------------------------------------------- Physical address of entry point : F000:5819 Physical data segment : 0040 Code segment limit : FFFFh Data segment limit : FFFFh |
CMOS |
|---|
CMOS ================================================================================ Real-time clock settings -------------------------------------------------------------------------------- Date (Y/M/D) : 2003:01:09 Time : 20:24:07 Real-Time clock alarm : not set Memory info -------------------------------------------------------------------------------- Base Memory : 640 KB Extended Memory : 64512 KB Floppy Disk Drive Types : 40h -------------------------------------------------------------------------------- Drive A: : 1.44MB, 3.5" drive Drive B: : No drive Hard Disk Drive Types -------------------------------------------------------------------------------- Hard Disk 1 Type : F0h Hard Disk 2 Type : 00h Equipment byte : 03h -------------------------------------------------------------------------------- Number of Floppy Drives : 1 Primary Video Display : Video card with BIOS ROM Display : disabled Keyboard : disabled FPU Installed : Yes Floppy Drive Installed : Yes Status register A : 26h -------------------------------------------------------------------------------- Divider control. : Normal (32768 Hz) Rate selection : 0.976562 ms (default) Status register B : 02h -------------------------------------------------------------------------------- Cycle update : disabled Periodic interrupt : disabled Alarm interrupt : disabled Update ended interrupt : disabled Square wave output : disabled Daylight savings time : disabled Time and calendar stored as BCD values Hours are stored in 24 hour mode Status register D : 80h -------------------------------------------------------------------------------- RTC Power is : good Diagnostic Status : 00h Shutdown Status : 00h (Vendor specific) Information Flags : C8h (Vendor specific) CMOS Checksum : 0936h CMOS RAM Raw Table -------------------------------------------------------------------------------- 0000: 07 40 24 03 - 20 19 04 09 ".@$. ..." 0008: 01 03 26 02 - 50 80 00 00 "..&.P..." 0010: 40 9E F0 80 - 03 80 02 00 "@......." 0018: FC 01 00 31 - 38 F8 2F 8C "...18./." 0020: 68 AC 1F 68 - AC 0F 12 99 "h..h...." 0028: 0D 14 00 00 - 00 28 09 36 ".....(.6" 0030: 00 FC 20 C8 - CF 00 1B 00 ".. ....." 0038: 8D BF E0 DE - 63 60 FF FF "....c`.." 0040: F9 1F 04 80 - 07 00 00 20 "....... " 0048: 50 C6 FA E1 - D5 1E 00 00 "P......." 0050: 00 00 02 01 - 11 01 00 00 "........" 0058: 00 00 00 00 - 1C C0 DF 00 "........" 0060: 80 00 00 00 - 00 00 00 00 "........" 0068: 00 00 00 34 - 80 30 18 00 "...4.0.." 0070: 83 01 18 63 - 78 01 DC 00 "...cx..." 0078: 06 04 00 00 - 00 00 00 00 "........" |
Keyboard |
|---|
Keyboard ================================================================================ Keyboard IDs : FA AB 41 Command Byte : 57h |
PIC |
|---|
PCMCIA |
|---|
PCMCIA Adapter(s) Detected: 2 |
Intel PCIC 82365SL C step |
|---|
PC Card Adapter : Intel PCIC 82365SL C step Location : ISA Extension Card Socket(s) : 2 I/O Base : 03E0h I/O Size : 0002h |
PC Card Adapter : Location : PCI Device on Motherboard Socket(s) : 2 I/O base : Not assigned |
BIOS |
|---|
BIOS ================================================================================ BIOS Date : 00/00/1985 BIOS Vendor : Phoenix BIOS Copyright : Copyright 1985-2001 Phoenix Technologies Ltd. BIOS Sign On : BIOS32 Service Directory found at address F000:68F0 -------------------------------------------------------------------------------- Physical Address of BIOS32 Entry Point : 000FD770 Revision Level : 00h Length of Data Structure : 16 bytes |
SMBus |
|---|
SMBus ================================================================================ System Management Bus BIOS Interface is not Installed |
ACPI |
|---|
Root System Description Pointer Structure -------------------------------------------------------------------------------- Location : F68C:0000H Signature : 'RSD PTR ' Checksum : C1h OEMID : TOSCPL RSDT Address : 0FEF6DE0h |
RSDT |
|---|
Root System Description Table -------------------------------------------------------------------------------- Signature : RD( Table length : 40 Byte Revision : 01h Checksum : A5h OEM ID : TOSCPL OEM Table ID : RSDT OEM Revision : 00 00 04 06 Creator ID : LTP Creator Revision : 00 00 00 00 Total entries : 1 Entry # 0 : 01F882B4H |
FACP |
|---|
Fixed ACPI Description Table -------------------------------------------------------------------------------- Signature : FCt Table length : 116 Byte Revision : 01h Checksum : 90h OEM ID : TOSCPL OEM Table ID : BTK20 OEM Revision : 00 00 04 06 Creator ID : PTL Creator Revision : 01 00 00 00 FIRMWARE_CTRL : 0FEFCFC0h DSDT : 0FEF6E08h INT_MODEL : 00h (Dual PIC, industry standard PC-AT type) SCI_INT : 0009h SMI_CMD : 00B2h ACPI_ENABLE : F0h ACPI_DISABLE : F1h S4BIOS_REQ : 00h PM1a_EVT_BLK : 00001000h PM1b_EVT_BLK : 00000000h PM1a_CNT_BLK : 00001004h PM1b_CNT_BLK : 00000000h PM2_CNT_BLK : 00001020h PM_TMR_BLK : 00001008h GPE0_BLK : 00001028h GPE1_BLK : 0000102Ch PM1_EVT_LEN : 04h PM1_CNT_LEN : 02h PM2_CNT_LEN : 01h PM_TM_LEN : 04h GPE0_BLK_LEN : 04h GPE1_BLK_LEN : 04h GPE1_BASE : 10h P_LVL2_LAT : 005Ah P_LVL3_LAT : 03E9h FLUSH_SIZE : 0000h FLUSH_STRIDE : 0000h DUTY_OFFSET : 01h DUTY_WIDTH : 03h DAY_ALRM : 0Dh MON_ALRM : 00h CENTURY : 32h Flags : 000000A5h |
DSDT |
|---|
Differentiated System Description Table
--------------------------------------------------------------------------------
Signature : DD?
Table length : 20868 Byte
Revision : 01h
Checksum : 94h
OEM ID : TOSCPL
OEM Table ID : BTK20
OEM Revision : 00 00 04 06
Creator ID : MSFT
Creator Revision : 0D 00 00 01
{
OperationRegion(PORT, 0x01, 0x80, 0x01)
Field(PORT, 0x01) {
P80H, 0x8,
}
OperationRegion(MNVS, 0x00, 0x0FEFCFAC, 0x10)
Field(MNVS, 0x10) {
OSYS, 0x10,
CMAP, 0x8,
CMBP, 0x8,
FDCP, 0x8,
LPTP, 0x8,
BTEN, 0x8,
THRT, 0x8,
BRAD, 0x8,
F5D0, 0x8,
F5D1, 0x8,
}
Name(_S0_, Package(0x03) {
0x00
0x00
0x00
})
Name(_S1_, Package(0x03) {
0x02
0x02
0x00
})
Name(_S3_, Package(0x03) {
0x05
0x05
0x00
})
Name(_S4_, Package(0x03) {
0x06
0x06
0x00
})
Name(_S5_, Package(0x03) {
0x07
0x07
0x00
})
Scope(\_PR_) {
Processor(CPU0, 0x00, 0x00001010, 0x06) {
Name(XPCT, Package(0x02) {
Buffer(0x11) {
0x82, 0x0C, 0x00, 0x01, 0x08, 0x00, 0x00, 0xB2,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x79,
0x00, }
Buffer(0x11) {
0x82, 0x0C, 0x00, 0x01, 0x08, 0x00, 0x00, 0xB3,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x79,
0x00, }
})
Name(XPSS, Package(0x02) {
Package(0x06) {
0x270F
0x0001869F
0x03E7
0x03E7
0x99
0x99
}
Package(0x06) {
0x270F
0x0001869F
0x03E7
0x03E7
0x99
0x99
}
})
Method(XPPC, 0x00) {
Return(0x00)
}
}
}
Name(ECDY, 0x05)
Name(OSTP, 0x00)
Method(_PTS, 0x01) {
Store(_T_0{
Or(\_SB_.PCI0.LPCB.SIRQ, 0x80, Zero)
\_SB_.PCI0.LPCB.PHSS
0x85
}
If(LEqual(Arg0, 0x03)) {
\_SB_.PCI0.LPCB.PHSS
0x81
}
If(LEqual(Arg0, 0x04)) {
Notify(\_SB_.PWRB, 0x02)
If(LGreater(OSTP, 0x00)) {
\_SB_.PCI0.LPCB.PHSS
0x0F
}
}
}
Scope(_GPE) {
Method(_L03, 0x00) {
Notify(\_SB_.PCI0.USB0, 0x02)
}
Method(_L04, 0x00) {
Notify(\_SB_.PCI0.USB1, 0x02)
}
Method(_L05, 0x00) {
Notify(\_SB_.PCI0.MODM, 0x02)
}
Method(_L08, 0x00) {
Notify(\_SB_.PCI0.PCIB, 0x02)
}
Method(_L0B, 0x00) {
Notify(\_SB_.PCI0.PCIB, 0x02)
}
Method(_L1D, 0x00) {
Store(===P_1===[Â ?/_BPILCLO
\S_C0PBHSr\S_C0PBPL/_BPILCLO?.S_I_??_B[2I__I +
"LDpLD[¤/_BPILCLO[%WB_I + SA¤ _R?1PR_I #Z0
01?00 }
Else {
If(LEqual(Z001, 0x00)) {
Store(Arg0, DUTY)
}
Else {
If(LLess(Arg0, Z001)) {
Store(Arg0, DUTY)
}
Else {
Store(Z001, DUTY)
}
}
Store(0x01, THEN)
Store(Arg0, Z000)
}
Return(THEN)
}
Method(PCLK, 0x00) {
Store(PTVL, Local0)
If(LEqual(Local0, 0x00)) {
Store(0x00, THEN)
Store(0x00, FTT_)
Store(0x00, Z001)
}
Else {
Decrement(Local0)
Store(Not(Local0, Zero), Local1)
If(LEqual(Z000, 0x00)) {
Store(Local1, DUTY)
}
Else {
If(LLess(Local1, Z000)) {
Store(Local1, DUTY)
}
Else {
Store(Z000, DUTY)
}
}
Store(0x01, THEN)
Store(Local1, Z001)
}
}
Method(PTMP, 0x01) {
Store(\_SB_.PCI0.LPCB.EC0_.CTMP, Local0)
Store(Local0, P80H)
Return(Local0)
}
Method(BAT0, 0x00) {
Divide(0x0FA0, 0x64, Zero, Local1)
Divide(\_SB_.PCI0.LPCB.EC0_.BRC0, Local1, Zero, Local2)
Return(Local2)
}
Method(BAT1, 0x00) {
Multiply(\_SB_.PCI0.LPCB.EC0_.BRC1, 0x64, Local1)
Divide(Local1, 0x1194, Zero, Local2)
Return(Local2)
}
Method(ISTA, 0x01) {
If(Arg0) {
\_SB_.PCI0.LPCB.PHSS
0x87
}
Else {
\_SB_.PCI0.LPCB.PHSS
0x86
}
Return(0x01)
}
Method(NSMM, 0x01) {
Store(Arg0, NSMF)
Return(NSMF)
}
Method(SECU, 0x01) {
If(\_SB_.EPWR.NSMF) {
\_SB_.PCI0.LPCB.PHSS
0x70
}
}
Method(PJID, 0x01) {
Return(\_SB_.PCI0.LPCB.EC0_.PJDD)
}
Method(BTLC, 0x01) {
Return(\_SB_.PCI0.LPCB.EC0_.BTCC)
}
}
Device(PCI0) {
Method(_INI, 0x00) {
If(CondRefOf(_OSI, Local0)) {
If(\_OSI) {
Wnos20 0x00, 0x2,
PM1L, 0x2,
0x00, 0x2,
PM1H, 0x2,
0x00, 0x2,
PM2L, 0x2,
0x00, 0x2,
PM2H, 0x2,
0x00, 0x2,
PM3L, 0x2,
0x00, 0x2,
PM3H, 0x2,
0x00, 0x2,
PM4L, 0x2,
0x00, 0x2,
PM4H, 0x2,
0x00, 0x2,
PM5L, 0x2,
0x00, 0x2,
PM5H, 0x2,
0x00, 0x2,
PM6L, 0x2,
0x00, 0x2,
PM6H, 0x2,
0x00, 0x2,
FDHC, 0x8,
}
Name(BUF0, Buffer(0x0201) {
0x88, 0x0E, 0x00, 0x02, 0x0C, 0x00, 0x00, 0x00,
0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x01,
0x00, 0x87, 0x18, 0x00, 0x01, 0x0C, 0x03, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF7,
0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF8,
0x0C, 0x00, 0x00, 0x00, 0x47, 0x01, 0xF8, 0x0C,
0xF8, 0x0C, 0x01, 0x08, 0x87, 0x18, 0x00, 0x01,
0x0C, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0D,
0x00, 0x00, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0xF3, 0x00, 0x00, 0x00, 0x87,
0x18, 0x00, 0x00, 0x0C, 0x03, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x0A, 0x00, 0xFF, 0xFF, 0x0B,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
0x00, 0x00, 0x87, 0x18, 0x00, 0x00, 0x0C, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x00,
0xFF, 0x3F, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x40, 0x00, 0x00, 0x00, 0x87, 0x18, 0x00,
0x00, 0x0C, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
0x40, 0x0C, 0x00, 0xFF, 0x7F, 0x0C, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
0x87, 0x18, 0x00, 0x00, 0x0C, 0x03, 0x00, 0x00,
0x00, 0x00, 0x00, 0x80, 0x0C, 0x00, 0xFF, 0xBF,
0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40,
0x00, 0x00, 0x00, 0x87, 0x18, 0x00, 0x00, 0x0C,
0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C,
0x00, 0xFF, 0xFF, 0x0C, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x87, 0x18,
0x00, 0x00, 0x0C, 0x03, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x0D, 0x00, 0xFF, 0x3F, 0x0D, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00,
0x00, 0x87, 0x18, 0x00, 0x00, 0x0C, 0x03, 0x00,
0x00, 0x00, 0x00, 0x00, 0x40, 0x0D, 0x00, 0xFF,
0x7F, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x40, 0x00, 0x00, 0x00, 0x87, 0x18, 0x00, 0x00,
0x0C, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
0x0D, 0x00, 0xFF, 0xBF, 0x0D, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x87,
0x18, 0x00, 0x00, 0x0C, 0x03, 0x00, 0x00, 0x00,
0x00, 0x00, 0xC0, 0x0D, 0x00, 0xFF, 0xFF, 0x0D,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00,
0x00, 0x00, 0x87, 0x18, 0x00, 0x00, 0x0C, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0E, 0x00,
0xFF, 0x3F, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x40, 0x00, 0x00, 0x00, 0x87, 0x18, 0x00,
0x00, 0x0C, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
0x40, 0x0E, 0x00, 0xFF, 0x7F, 0x0E, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
0x87, 0x18, 0x00, 0x00, 0x0C, 0x03, 0x00, 0x00,
0x00, 0x00, 0x00, 0x80, 0x0E, 0x00, 0xFF, 0xBF,
0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40,
0x00, 0x00, 0x00, 0x87, 0x18, 0x00, 0x00, 0x0C,
0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x0E,
0x00, 0xFF, 0xFF, 0x0E, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x87, 0x18,
0x00, 0x00, 0x0C, 0x03, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x0F, 0x00, 0xFF, 0xFF, 0x0F, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
0x00, 0x87, 0x18, 0x00, 0x00, 0x0C, 0x03, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
0xFF, 0xBF, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x87, 0x18, 0x00, 0x00,
0x0C, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x79,
0x00, })
Method(_CRS, 0x08) {
If(PM1L) {
CreateDWordField(BUF0, 0x80, C0LN)
Store(Zero, C0LN)
}
If(LEqual(PM1L, 0x01)) {
BitField(BUF0, 0x0378, C0RW)
Store(Zero, C0RW)
}
If(PM1H) {
CreateDWordField(BUF0, 0x9B, C4LN)
Store(Zero, C4LN)
}
If(LEqual(PM1H, 0x01)) {
BitField(BUF0, 0x0450, C4RW)
Store(Zero, C4RW)
}
If(PM2L) {
CreateDWordField(BUF0, 0xB6, C8LN)
Store(Zero, C8LN)
}
If(LEqual(PM2L, 0x01)) {
BitField(BUF0, 0x0528, C8RW)
Store(Zero, C8RW)
}
If(PM2H) {
CreateDWordField(BUF0, 0xD1, CCLN)
Store(Zero, CCLN)
}
If(LEqual(PM2H, 0x01)) {
BitField(BUF0, 0x0600, CCRW)
Store(Zero, CCRW)
}
If(PM3L) {
CreateDWordField(BUF0, 0xEC, D0LN)
Store(Zero, D0LN)
}
If(LEqual(PM3L, 0x01)) {
BitField(BUF0, 0x06D8, D0RW)
Store(Zero, D0RW)
}
If(PM3H) {
CreateDWordField(BUF0, 0x0107, D4LN)
Store(Zero, D4LN)
}
If(LEqual(PM3H, 0x01)) {
BitField(BUF0, 0x07B0, D4RW)
Store(Zero, D4RW)
}
If(PM4L) {
CreateDWordField(BUF0, 0x0122, D8LN)
Store(Zero, D8LN)
}
If(LEqual(PM4L, 0x01)) {
BitField(BUF0, 0x0888, D8RW)
Store(Zero, D8RW)
}
If(PM4H) {
CreateDWordField(BUF0, 0x013D, DCLN)
Store(Zero, DCLN)
}
If(LEqual(PM4H, 0x01)) {
BitField(BUF0, 0x0960, DCRW)
Store(Zero, DCRW)
}
If(PM5L) {
CreateDWordField(BUF0, 0x0158, E0LN)
Store(Zero, E0LN)
}
If(LEqual(PM5L, 0x01)) {
BitField(BUF0, 0x0A38, E0RW)
Store(Zero, E0RW)
}
If(PM5H) {
CreateDWordField(BUF0, 0x0173, E4LN)
Store(Zero, E4LN)
}
If(LEqual(PM5H, 0x01)) {
BitField(BUF0, 0x0B10, E4RW)
Store(Zero, E4RW)
}
If(PM6L) {
CreateDWordField(BUF0, 0x018E, E8LN)
Store(Zero, E8LN)
}
If(LEqual(PM6L, 0x01)) {
BitField(BUF0, 0x0BE8, E8RW)
Store(Zero, E8RW)
}
If(PM6H) {
CreateDWordField(BUF0, 0x01A9, ECLN)
Store(Zero, ECLN)
}
If(LEqual(PM6H, 0x01)) {
BitField(BUF0, 0x0CC0, ECRW)
Store(Zero, ECRW)
}
If(PM0H) {
CreateDWordField(BUF0, 0x01C4, F0LN)
Store(Zero, F0LN)
}
If(LEqual(PM0H, 0x01)) {
BitField(BUF0, 0x0D98, F0RW)
Store(Zero, F0RW)
}
CreateDWordField(BUF0, 0x01D3, M1MN)
CreateDWordField(BUF0, 0x01D7, M1MX)
CreateDWordField(BUF0, 0x01DF, M1LN)
Multiply(0x02000000, DRB7, M1MN)
Add(Subtract(M1MX, M1MN, Zero), 0x01, M1LN)
ShiftRight(And(\_SB_.PCI0.LPCB.MTSE, 0x00038000, Zero), 0x0F, Local0)
If(And(Local0, 0x04, Zero)) {
CreateDWordField(BUF0, 0x01EE, M2MN)
CreateDWordField(BUF0, 0x01F2, M2MX)
CreateDWordField(BUF0, 0x01FA, M2LN)
Store(0xFED00000, M2MN)
Store(0xFED003FF, M2MX)
Store(0x0400, M2LN)
If(LEqual(Local0, 0x05)) {
Store(0xFED01000, M2MN)
Store(0xFED013FF, M2MX)
}
If(LEqual(Local0, 0x06)) {
Store(0xFED02000, M2MN)
Store(0xFED023FF, M2MX)
}
If(LEqual(Local0, 0x07)) {
Store(0xFED03000, M2MN)
Store(0xFED033FF, M2MX)
}
}
Return(BUF0)
}
Name(_PRT, Package(0x06) {
Package(0x04) {
0x0001FFFF
0x00
\_SB_.PCI0.LPCB.LNKA
0x00
}
Package(0x04) {
0x001DFFFF
0x00
\_SB_.PCI0.LPCB.LNKA
0x00
}
Package(0x04) {
0x001DFFFF
0x01
\_SB_.PCI0.LPCB.LNKD
0x00
}
Package(0x04) {
0x001DFFFF
0x02
\_SB_.PCI0.LPCB.LNKC
0x00
}
Package(0x04) {
0x001FFFFF
0x00
\_SB_.PCI0.LPCB.LNKC
0x00
}
Package(0x04) {
0x001FFFFF
0x01
\_SB_.PCI0.LPCB.LNKB
0x00
}
})
Device(AGPB) {
Name(_ADR, 0x00010000)
Name(_PRT, Package(0x02) {
Package(0x04) {
0xFFFF
0x00
\_SB_.PCI0.LPCB.LNKA
0x00
}
Package(0x04) {
0xFFFF
0x01
\_SB_.PCI0.LPCB.LNKB
0x00
}
})
Device(VGA_) {
Name(_ADR, 0x00)
Name(SWIT, 0x01)
Name(CRTA, 0x01)
Name(LCDA, 0x01)
Name(TVAA, 0x01)
Name(VLDF, 0x01)
Method(_STA, 0x00) {
Store(VASA[¤_S
_S })
}
Device(CRT_) {
Method(_ADR, 0x00) {
Return(0x0100)
}
Method(_DCS, 0x00) {
\_SB_.PCI0.LPCB.PHSS
0x0C
Store(\_SB_.PCI0.LPCB.INF_, Local0)
And(Local0, 0x02, Local0)
If(Local0) {
Store(0x01, CRTA)
}
Else {
Store(0x00, CRTA)
}
If(CRTA) {
Return(0x1F)
}
Else {
Return(0x1D)
}
}
Method(_DGS, 0x00) {
Store(CT-_GIF`\S_C0PBN1Â ?
{aLFVD
VDÂ LF)` aTL aTL aTL)` aTL aTL aTLB?
 ?
SB
 ?
SB
 ?
SB
 ?
SB
 ?
SB
?pLFTL SI
\S_C0PBHSMSB h
C
}
}
Method(_DSS, 0x01) {
Store(LD-_S
}
Else {
Return(0x00)
}
}
Method(_DSS, 0x01) {
Store(T -DS[SWÂ SI
\S_C0PBHS \S_C0PBN_p/_BPILCIFaa`VD{LF?LFMVDÂ ?
 ?
SB
 ?
SB
 ?
SB
 ?
 ?
SB
 ?
SB
 ?
SB
 ` aTL aTL aTL aTL aTL
VDSB
? ?WT/_BPILCPS
TLÂ ?
pLD[pCTpLDpTAÂ ?
pCT[pCTpLDpTAÂ ?
pLDCT[pCTpLDpTAÂ ?
pT 0x05
}
If(LEqual(Local1, 0x05)) {
STBL
0x01
}
}
If(LEqual(Local0, 0x07)) {
If(LEqual(Local1, 0x01)) {
STBL
0x03
}
If(LEqual(Local1, 0x02)) {
STBL
0x05
}
If(LEqual(Local1, 0x03)) {
STBL
0x02
}
If(LEqual(Local1, 0x04)) {
STBL
0x01
}
If(LEqual(Local1, 0x05)) {
STBL
0x04
}
}
}
Else {
Store(0x01, VLDF)
STBL
0x01
}
}
Else {
If(LEqual(SWIT, 0x01)) {
\_SB_.PCI0.LPCB.PHSS
0x01
}
}
}
Method(STBL, 0x01) {
If(LEqual(Arg0, 0x01)) {
Store(LD[pCTpLDpTAÂ ?
pCT[pCTpLDpTAÂ ?
pLDCT[pCTpLDpTAÂ ?
pTStore(One, LCDA)
Store(Zero, TVAA)
}
If(LEqual(Arg0, 0x02)) {
Store(CT[pCTpLDpTAÂ ?
pLDCT[pCTpLDpTAÂ ?
pTy Return(0x0F)
}
}
Device(CB2_) {
Name(_ADR, 0x00040001)
Method(_STA, 0x00) {
Return(0x0F)
}
}
Device(ELAN) {
Name(_ADR, 0x00010000)
Method(_STA, 0x00) {
Return(0x0F)
}
Name(_PRW, Package(0x02) {
0x08
0x03
})
}
}
Device(LPCB) {
Name(_ADR, 0x001F0000)
OperationRegion(PMIO, 0x01, 0x1000, 0x2C)
Field(PMIO, 0x12) {
0x01, 0x2,
0x00, 0x0,
@ 0x00) {
SMIC, 0x8,
}
OperationRegion(SMI1, 0x00, 0x0FEFCEAD, 0x00000090)
Field(SMI1, 0x00) {
BCMD, 0x8,
DID_, 0x20,
INFO, 0x400,
}
Field(SMI1, 0x00) {
0x01, 0x1,
0x00, 0x0,
(INF_, 0x8,
INF1, 0x20,
}
Mutex(PSMX, 0x00)
Method(PHSS, 0x01) {
Acquire(PSMX)
Ones
Ones
Store(0x80, BCMD)
Store(Arg0, DID_)
Store(Zero, SMIC)
Release(PSMX)
}
OperationRegion(LPC0, 0x02, 0x40, 0xC0)
Field(LPC0, 0x00) {
0x00, 0x100,
PIRA, 0x8,
PIRB, 0x8,
PIRC, 0x8,
PIRD, 0x8,
0x00, 0x20,
PIRE, 0x8,
PIRF, 0x8,
PIRG, 0x8,
PIRH, 0x8,
0x00, 0x320,
MTSE, 0x20,
}
Device(LNKA) {
Name(_HID, 0x0F0CD041)
Name(_UID, 0x01)
Method(_DIS, 0x08) {
Or(PIRA, 0x80, PIRA)
}
Name(_PRS, Buffer(0x06) {0x23, 0x00, 0x04, 0x18, 0x79, 0x00, })
Method(_CRS, 0x08) {
Name(RTLA, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateWordField(RTLA, 0x01, IRQ0)
Store(Zero, IRQ0)
If(LNot(And(PIRA, 0x80, Zero))) {
And(PIRA, 0x0F, Local0)
ShiftLeft(0x01, Local0, IRQ0)
}
Return(RTLA)
}
Method(_SRS, 0x09) {
CreateWordField(Arg0, 0x01, IRQ0)
FindSetRightBit(IRQ0, Local0)
Decrement(Local0)
Store(Local0, PIRA)
}
Method(_STA, 0x08) {
And(PIRA, 0x80, Local0)
If(Local0) {
Return(0x09)
}
Else {
Return(0x0B)
}
}
}
Device(LNKB) {
Name(_HID, 0x0F0CD041)
Name(_UID, 0x02)
Method(_DIS, 0x00) {
Or(PIRB, 0x80, PIRB)
}
Name(_PRS, Buffer(0x06) {0x23, 0x00, 0x04, 0x18, 0x79, 0x00, })
Method(_CRS, 0x08) {
Name(RTLB, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateWordField(RTLB, 0x01, IRQ0)
Store(Zero, IRQ0)
If(LNot(And(PIRB, 0x80, Zero))) {
And(PIRB, 0x0F, Local0)
ShiftLeft(0x01, Local0, IRQ0)
}
Return(RTLB)
}
Method(_SRS, 0x09) {
CreateWordField(Arg0, 0x01, IRQ0)
FindSetRightBit(IRQ0, Local0)
Decrement(Local0)
Store(Local0, PIRB)
}
Method(_STA, 0x08) {
And(PIRB, 0x80, Local0)
If(Local0) {
Return(0x09)
}
Else {
Return(0x0B)
}
}
}
Device(LNKC) {
Name(_HID, 0x0F0CD041)
Name(_UID, 0x03)
Method(_DIS, 0x00) {
Or(PIRC, 0x80, PIRC)
}
Name(_PRS, Buffer(0x06) {0x23, 0x00, 0x02, 0x18, 0x79, 0x00, })
Method(_CRS, 0x08) {
Name(RTLC, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateWordField(RTLC, 0x01, IRQ0)
Store(Zero, IRQ0)
If(LNot(And(PIRC, 0x80, Zero))) {
And(PIRC, 0x0F, Local0)
ShiftLeft(0x01, Local0, IRQ0)
}
Return(RTLC)
}
Method(_SRS, 0x09) {
CreateWordField(Arg0, 0x01, IRQ0)
FindSetRightBit(IRQ0, Local0)
Decrement(Local0)
Store(Local0, PIRC)
}
Method(_STA, 0x08) {
And(PIRC, 0x80, Local0)
If(Local0) {
Return(0x09)
}
Else {
Return(0x0B)
}
}
}
Device(LNKD) {
Name(_HID, 0x0F0CD041)
Name(_UID, 0x04)
Method(_DIS, 0x00) {
Or(PIRD, 0x80, PIRD)
}
Name(_PRS, Buffer(0x06) {0x23, 0x00, 0x02, 0x18, 0x79, 0x00, })
Method(_CRS, 0x08) {
Name(RTLD, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateWordField(RTLD, 0x01, IRQ0)
Store(Zero, IRQ0)
If(LNot(And(PIRD, 0x80, Zero))) {
And(PIRD, 0x0F, Local0)
ShiftLeft(0x01, Local0, IRQ0)
}
Return(RTLD)
}
Method(_SRS, 0x09) {
CreateWordField(Arg0, 0x01, IRQ0)
FindSetRightBit(IRQ0, Local0)
Decrement(Local0)
Store(Local0, PIRD)
}
Method(_STA, 0x08) {
And(PIRD, 0x80, Local0)
If(Local0) {
Return(0x09)
}
Else {
Return(0x0B)
}
}
}
Device(LNKE) {
Name(_HID, 0x0F0CD041)
Name(_UID, 0x05)
Method(_DIS, 0x00) {
Or(PIRE, 0x80, PIRE)
}
Name(_PRS, Buffer(0x06) {0x23, 0xB8, 0xDC, 0x18, 0x79, 0x00, })
Method(_CRS, 0x08) {
Name(RTLE, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateWordField(RTLE, 0x01, IRQ0)
Store(Zero, IRQ0)
If(LNot(And(PIRE, 0x80, Zero))) {
And(PIRE, 0x0F, Local0)
ShiftLeft(0x01, Local0, IRQ0)
}
Return(RTLE)
}
Method(_SRS, 0x09) {
CreateWordField(Arg0, 0x01, IRQ0)
FindSetRightBit(IRQ0, Local0)
Decrement(Local0)
Store(Local0, PIRE)
}
Method(_STA, 0x08) {
And(PIRE, 0x80, Local0)
If(Local0) {
Return(0x00)
}
Else {
Return(0x0B)
}
}
}
Device(LNKF) {
Name(_HID, 0x0F0CD041)
Name(_UID, 0x06)
Method(_DIS, 0x00) {
Or(PIRF, 0x80, PIRF)
}
Name(_PRS, Buffer(0x06) {0x23, 0xB8, 0xDC, 0x18, 0x79, 0x00, })
Method(_CRS, 0x08) {
Name(RTLF, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateWordField(RTLF, 0x01, IRQ0)
Store(Zero, IRQ0)
If(LNot(And(PIRF, 0x80, Zero))) {
And(PIRF, 0x0F, Local0)
ShiftLeft(0x01, Local0, IRQ0)
}
Return(RTLF)
}
Method(_SRS, 0x09) {
CreateWordField(Arg0, 0x01, IRQ0)
FindSetRightBit(IRQ0, Local0)
Decrement(Local0)
Store(Local0, PIRF)
}
Method(_STA, 0x08) {
And(PIRF, 0x80, Local0)
If(Local0) {
Return(0x00)
}
Else {
Return(0x0B)
}
}
}
Device(LNKG) {
Name(_HID, 0x0F0CD041)
Name(_UID, 0x07)
Method(_DIS, 0x00) {
Or(PIRG, 0x80, PIRG)
}
Name(_PRS, Buffer(0x06) {0x23, 0xB8, 0xDC, 0x18, 0x79, 0x00, })
Method(_CRS, 0x08) {
Name(RTLG, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateWordField(RTLG, 0x01, IRQ0)
Store(Zero, IRQ0)
If(LNot(And(PIRG, 0x80, Zero))) {
And(PIRG, 0x0F, Local0)
ShiftLeft(0x01, Local0, IRQ0)
}
Return(RTLG)
}
Method(_SRS, 0x09) {
CreateWordField(Arg0, 0x01, IRQ0)
FindSetRightBit(IRQ0, Local0)
Decrement(Local0)
Store(Local0, PIRF)
}
Method(_STA, 0x08) {
And(PIRG, 0x80, Local0)
If(Local0) {
Return(0x00)
}
Else {
Return(0x0B)
}
}
}
Device(LNKH) {
Name(_HID, 0x0F0CD041)
Name(_UID, 0x08)
Method(_DIS, 0x00) {
Or(PIRH, 0x80, PIRH)
}
Name(_PRS, Buffer(0x06) {0x23, 0x20, 0x00, 0x18, 0x79, 0x00, })
Method(_CRS, 0x08) {
Name(RTLH, Buffer(0x06) {0x23, 0x00, 0x00, 0x18, 0x79, 0x00, })
CreateWordField(RTLH, 0x01, IRQ0)
Store(Zero, IRQ0)
If(LNot(And(PIRH, 0x80, Zero))) {
And(PIRH, 0x0F, Local0)
ShiftLeft(0x01, Local0, IRQ0)
}
Return(RTLH)
}
Method(_SRS, 0x09) {
CreateWordField(Arg0, 0x01, IRQ0)
FindSetRightBit(IRQ0, Local0)
Decrement(Local0)
Store(Local0, PIRH)
}
Method(_STA, 0x08) {
And(PIRH, 0x80, Local0)
If(Local0) {
Return(0x00)
}
Else {
Return(0x0B)
}
}
}
Device(TIMR) {
Name(_HID, 0x0001D041)
Name(BUF0, Buffer(0x12) {
0x47, 0x01, 0x40, 0x00, 0x40, 0x00, 0x01, 0x04,
0x47, 0x01, 0x50, 0x00, 0x50, 0x00, 0x10, 0x04,
0x79, 0x00, })
Name(BUF1, Buffer(0x15) {
0x47, 0x01, 0x40, 0x00, 0x40, 0x00, 0x01, 0x04,
0x47, 0x01, 0x50, 0x00, 0x50, 0x00, 0x10, 0x04,
0x22, 0x01, 0x00, 0x79, 0x00, })
Method(_CRS, 0x08) {
If(And(MTSE, 0x00020000, Zero)) {
Return(BUF0)
}
Return(BUF1)
}
}
Device(IPIC) {
Name(_HID, 0xD041)
Name(_CRS, Buffer(0x8D) {
0x47, 0x01, 0x20, 0x00, 0x20, 0x00, 0x01, 0x02,
0x47, 0x01, 0x24, 0x00, 0x24, 0x00, 0x01, 0x02,
0x47, 0x01, 0x28, 0x00, 0x28, 0x00, 0x01, 0x02,
0x47, 0x01, 0x2C, 0x00, 0x2C, 0x00, 0x01, 0x02,
0x47, 0x01, 0x30, 0x00, 0x30, 0x00, 0x01, 0x02,
0x47, 0x01, 0x34, 0x00, 0x34, 0x00, 0x01, 0x02,
0x47, 0x01, 0x38, 0x00, 0x38, 0x00, 0x01, 0x02,
0x47, 0x01, 0x3C, 0x00, 0x3C, 0x00, 0x01, 0x02,
0x47, 0x01, 0xA0, 0x00, 0xA0, 0x00, 0x01, 0x02,
0x47, 0x01, 0xA4, 0x00, 0xA4, 0x00, 0x01, 0x02,
0x47, 0x01, 0xA8, 0x00, 0xA8, 0x00, 0x01, 0x02,
0x47, 0x01, 0xAC, 0x00, 0xAC, 0x00, 0x01, 0x02,
0x47, 0x01, 0xB0, 0x00, 0xB0, 0x00, 0x01, 0x02,
0x47, 0x01, 0xB4, 0x00, 0xB4, 0x00, 0x01, 0x02,
0x47, 0x01, 0xB8, 0x00, 0xB8, 0x00, 0x01, 0x02,
0x47, 0x01, 0xBC, 0x00, 0xBC, 0x00, 0x01, 0x02,
0x47, 0x01, 0xD0, 0x04, 0xD0, 0x04, 0x01, 0x02,
0x22, 0x04, 0x00, 0x79, 0x00, })
}
Device(RTC_) {
Name(_HID, 0x000BD041)
Name(BUF0, Buffer(0x0A) {
0x47, 0x01, 0x70, 0x00, 0x70, 0x00, 0x01, 0x08,
0x79, 0x00, })
Name(BUF1, Buffer(0x0D) {
0x47, 0x01, 0x70, 0x00, 0x70, 0x00, 0x01, 0x08,
0x22, 0x00, 0x01, 0x79, 0x00, })
Method(_CRS, 0x08) {
If(And(MTSE, 0x00020000, Zero)) {
Return(BUF0)
}
Return(BUF1)
}
}
Device(MATH) {
Name(_HID, 0x040CD041)
Name(_CRS, Buffer(0x0D) {
0x47, 0x01, 0xF0, 0x00, 0xF0, 0x00, 0x01, 0x01,
0x22, 0x00, 0x20, 0x79, 0x00, })
}
Device(DMAC) {
Name(_HID, 0x0002D041)
Name(_CRS, Buffer(0x2D) {
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x20,
0x47, 0x01, 0x81, 0x00, 0x81, 0x00, 0x01, 0x0F,
0x47, 0x01, 0x90, 0x00, 0x90, 0x00, 0x01, 0x02,
0x47, 0x01, 0x93, 0x00, 0x93, 0x00, 0x01, 0x0D,
0x47, 0x01, 0xC0, 0x00, 0xC0, 0x00, 0x01, 0x20,
0x2A, 0x10, 0x01, 0x79, 0x00, })
}
Device(MBRD) {
Name(_HID, 0x020CD041)
Name(_CRS, Buffer(0xB2) {
0x47, 0x01, 0x2E, 0x00, 0x2E, 0x00, 0x01, 0x02,
0x47, 0x01, 0x4E, 0x00, 0x4E, 0x00, 0x01, 0x02,
0x47, 0x01, 0x61, 0x00, 0x61, 0x00, 0x01, 0x01,
0x47, 0x01, 0x63, 0x00, 0x63, 0x00, 0x01, 0x01,
0x47, 0x01, 0x65, 0x00, 0x65, 0x00, 0x01, 0x01,
0x47, 0x01, 0x67, 0x00, 0x67, 0x00, 0x01, 0x01,
0x47, 0x01, 0x80, 0x00, 0x80, 0x00, 0x01, 0x01,
0x47, 0x01, 0x92, 0x00, 0x92, 0x00, 0x01, 0x01,
0x47, 0x01, 0xB2, 0x00, 0xB2, 0x00, 0x01, 0x02,
0x47, 0x01, 0x00, 0x02, 0x00, 0x02, 0x01, 0x10,
0x47, 0x01, 0x00, 0x06, 0x00, 0x06, 0x01, 0x10,
0x47, 0x01, 0x00, 0x07, 0x00, 0x07, 0x01, 0x10,
0x47, 0x01, 0x00, 0x10, 0x00, 0x10, 0x01, 0x80,
0x47, 0x01, 0x80, 0x11, 0x80, 0x11, 0x01, 0x40,
0x47, 0x01, 0x00, 0x12, 0x00, 0x12, 0x01, 0x10,
0x47, 0x01, 0x00, 0xFE, 0x00, 0xFE, 0x01, 0x02,
0x86, 0x09, 0x00, 0x01, 0x00, 0xFC, 0xBF, 0xFE,
0x00, 0x04, 0x00, 0x00, 0x86, 0x09, 0x00, 0x00,
0x00, 0x00, 0xF8, 0xFF, 0x00, 0x00, 0x08, 0x00,
0x86, 0x09, 0x00, 0x01, 0x00, 0x80, 0xBF, 0xFA,
0xE0, 0x0F, 0x00, 0x00, 0x86, 0x09, 0x00, 0x01,
0x00, 0xA0, 0xBF, 0xFA, 0xE0, 0x0F, 0x00, 0x00,
0x79, 0x00, })
}
Device(PS2K) {
Name(_HID, 0x0303D041)
Name(_CRS, Buffer(0x16) {
0x47, 0x01, 0x60, 0x00, 0x60, 0x00, 0x01, 0x01,
0x47, 0x01, 0x64, 0x00, 0x64, 0x00, 0x01, 0x01,
0x23, 0x02, 0x00, 0x01, 0x79, 0x00, })
}
Device(PS2M) {
Name(_HID, 0x130FD041)
Name(_CRS, Buffer(0x06) {0x23, 0x00, 0x10, 0x01, 0x79, 0x00, })
}
Device(SIO_) {
Name(_HID, 0x050AD041)
Method(_INI, 0x00) {
Store(0x00, \_SB_.PCI0.LPCB.CMAD)
}
OperationRegion(SIIO, 0x01, 0x2E, 0x02)
Field(SIIO, 0x01) {
INDX, 0x8,
DATA, 0x8,
}
Mutex(S227, 0x00)
Method(ENTR, 0x00) {
Store(0x55, INDX)
}
Method(EXIT, 0x00) {
Store(0xAA, INDX)
}
Method(RDRG, 0x01) {
ENTR
Store(Arg0, INDX)
Store(DATA, Local0)
EXIT
Return(Local0)
}
Method(WRRG, 0x02) {
ENTR
Store(Arg0, INDX)
Store(Arg1, DATA)
EXIT
}
Method(READ, 0x03) {
Acquire(S227)
Ones
Ones
If(LEqual(Arg0, 0x00)) {
Store(RDRG, Arg1)
Local1
}
And(Local1, Arg2, Local1)
Release(S227)
Return(Local1)
}
Method(WRIT, 0x03) {
Acquire(S227)
Ones
Ones
If(LEqual(Arg0, 0x00)) {
WRRG
Arg1
Arg2
}
Release(S227)
}
Device(IRDA) {
Name(_HID, 0x1005D041)
Name(IENA, 0x01)
Name(RSRC, Buffer(0x0D) {
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x22, 0x00, 0x00, 0x79, 0x00, })
Method(_STA, 0x00) {
Store(READ, 0x00)
0x2B
0xFF
Local0
If(LNot(LEqual(Local0, 0x00))) {
Return(0x00)
}
Store(READ, 0x00)
0x25
0xFF
Local0
If(LEqual(Local0, 0x00)) {
Return(0x00)
}
Store(READ, 0x00)
0x0C
0x38
Local0
If(LNot(LEqual(Local0, 0x10))) {
If(LNot(LEqual(Local0, 0x08))) {
Return(0x00)
}
Else {
Store(READ, 0x00)
0x2B
0xFF
Local0
If(LNot(LEqual(Local0, 0x00))) {
Return(0x00)
}
}
}
Store(IENA, Local0)
If(LEqual(Local0, 0x00)) {
Return(0x0D)
}
Else {
Return(0x0F)
}
}
Method(_SRS, 0x01) {
CreateByteField(Arg0, 0x02, IOLO)
CreateByteField(Arg0, 0x03, IOHI)
CreateByteField(Arg0, 0x09, IRQL)
WRIT
0x00
0x25
0x00
FindSetRightBit(IRQL, Local0)
Decrement(Local0)
Store(READ, 0x00)
0x28
0xF0
Local1
Or(Local0, Local1, Local0)
WRIT
0x00
0x28
Local0
Store(IOLO, Local0)
ShiftRight(Local0, 0x02, Local0)
And(Local0, 0xFE, Local0)
Store(IOHI, Local1)
ShiftLeft(Local1, 0x06, Local1)
Or(Local0, Local1, Local0)
WRIT
0x00
0x25
Local0
Store(READ, 0x00)
0x02
0xFF
Local0
Or(Local0, 0x80, Local0)
WRIT
0x00
0x02
Local0
Store(READ, 0x00)
0x07
0xFF
Local0
Not(0x20, Local1)
And(Local0, Local1, Local0)
WRIT
0x00
0x07
Local0
Store(0x01, IENA)
}
Method(_CRS, 0x00) {
And(_STA, 0x02, Local0)
If(LEqual(Local0, Zero)) {
Return(RSRC)
}
Name(BUF0, Buffer(0x0D) {
0x47, 0x01, 0xF8, 0x03, 0xF8, 0x03, 0x08, 0x08,
0x22, 0x10, 0x00, 0x79, 0x00, })
CreateByteField(BUF0, 0x02, IOLO)
CreateByteField(BUF0, 0x03, IOHI)
CreateByteField(BUF0, 0x04, IORL)
CreateByteField(BUF0, 0x05, IORH)
CreateByteField(BUF0, 0x09, IRQL)
CreateByteField(BUF0, 0x0A, IRQH)
Store(READ, 0x00)
0x25
0xFF
Local0
Store(Local0, Local1)
And(Local1, 0xC0, Local1)
ShiftRight(Local1, 0x06, Local1)
ShiftLeft(Local0, 0x02, Local0)
Store(Local0, IOLO)
Store(Local1, IOHI)
Store(IOLO, IORL)
Store(IOHI, IORH)
Store(READ, 0x00)
0x28
0x0F
Local0
Store(0x01, Local1)
ShiftLeft(Local1, Local0, IRQL)
Store(0x00, IRQH)
Return(BUF0)
}
Name(_PRS, Buffer(0x37) {
0x31, 0x04, 0x47, 0x01, 0xF8, 0x02, 0xF8, 0x02,
0x01, 0x08, 0x22, 0x08, 0x00, 0x31, 0x04, 0x47,
0x01, 0xE8, 0x02, 0xE8, 0x02, 0x01, 0x08, 0x22,
0x08, 0x00, 0x31, 0x04, 0x47, 0x01, 0xF8, 0x03,
0xF8, 0x03, 0x01, 0x08, 0x22, 0x10, 0x00, 0x31,
0x04, 0x47, 0x01, 0xE8, 0x03, 0xE8, 0x03, 0x01,
0x08, 0x22, 0x10, 0x00, 0x38, 0x79, 0x00, })
Method(_DIS, 0x00) {
Store(0x00, IENA)
}
Method(_PS0, 0x00) {
Store(READ, 0x00)
0x02
0xFF
Local0
Or(Local0, 0x80, Local0)
WRIT
0x00
0x02
Local0
Store(READ, 0x00)
0x07
0xFF
Local0
Not(0x20, Local1)
And(Local0, Local1, Local0)
WRIT
0x00
0x07
Local0
}
Method(_PS1, 0x00) {
Store(READ, 0x00)
0x07
0xFF
Local0
Or(Local0, 0x20, Local0)
WRIT
0x00
0x07
Local0
}
Method(_PS3, 0x00) {
Store(READ, 0x00)
0x02
0xFF
Local0
Not(0x80, Local1)
And(Local0, Local1, Local0)
WRIT
0x00
0x02
Local0
}
}
Device(FIR_) {
Name(_HID, 0x10F0A34D)
Name(FENA, 0x01)
Name(BUF0, Buffer(0x18) {
0x47, 0x01, 0xF8, 0x02, 0xF8, 0x02, 0x01, 0x08,
0x47, 0x01, 0xF8, 0x06, 0xF8, 0x06, 0x01, 0x08,
0x22, 0x0A, 0x00, 0x2A, 0x0A, 0x00, 0x79, 0x00, })
Name(RSRC, Buffer(0x18) {
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x22, 0x01, 0x00, 0x2A, 0x0A, 0x00, 0x79, 0x00, })
Method(_STA, 0x00) {
Store(READ, 0x00)
0x25
0xFF
Local0
If(LEqual(Local0, 0x00)) {
Return(0x00)
}
Store(READ, 0x00)
0x2B
0xFF
Local0
If(LEqual(Local0, 0x00)) {
Return(0x00)
}
Store(FENA, Local0)
If(LEqual(Local0, 0x00)) {
Return(0x0D)
}
Else {
Return(0x0F)
}
}
Method(_SRS, 0x01) {
CreateByteField(Arg0, 0x02, IOLO)
CreateByteField(Arg0, 0x03, IOHI)
CreateByteField(Arg0, 0x0A, I2LO)
CreateByteField(Arg0, 0x0B, I2HI)
CreateByteField(Arg0, 0x11, IRQL)
CreateByteField(Arg0, 0x14, DMAC)
WRIT
0x00
0x25
0x00
FindSetRightBit(IRQL, Local0)
Decrement(Local0)
Store(READ, 0x00)
0x28
0xF0
Local1
Or(Local0, Local1, Local0)
WRIT
0x00
0x28
Local0
Store(IOLO, Local0)
ShiftRight(Local0, 0x02, Local0)
And(Local0, 0xFE, Local0)
Store(IOHI, Local1)
ShiftLeft(Local1, 0x06, Local1)
Or(Local0, Local1, Local0)
WRIT
0x00
0x25
Local0
Store(I2LO, Local0)
ShiftRight(Local0, 0x03, Local0)
Store(I2HI, Local1)
ShiftLeft(Local1, 0x05, Local1)
Or(Local0, Local1, Local0)
WRIT
0x00
0x2B
Local0
FindSetRightBit(DMAC, Local0)
Decrement(Local0)
WRIT
0x00
0x2C
Local0
Store(READ, 0x00)
0x0A
0xFF
Local0
Not(0xC0, Local1)
And(Local0, Local1, Local0)
Or(Local0, 0x40, Local0)
WRIT
0x00
0x0A
Local0
Store(READ, 0x00)
0x0C
0xFF
Local0
Not(0x38, Local1)
And(Local0, Local1, Local0)
Or(Local0, 0x08, Local0)
WRIT
0x00
0x0C
Local0
Store(READ, 0x00)
0x02
0xFF
Local0
Or(Local0, 0x80, Local0)
WRIT
0x00
0x02
Local0
Store(READ, 0x00)
0x07
0xFF
Local0
Not(0x20, Local1)
And(Local0, Local1, Local0)
WRIT
0x00
0x07
Local0
Store(0x01, FENA)
}
Method(_CRS, 0x00) {
And(_STA, 0x02, Local0)
If(LEqual(Local0, Zero)) {
Return(RSRC)
}
CreateByteField(BUF0, 0x02, IOLO)
CreateByteField(BUF0, 0x03, IOHI)
CreateByteField(BUF0, 0x04, IORL)
CreateByteField(BUF0, 0x05, IORH)
CreateByteField(BUF0, 0x0A, I2LO)
CreateByteField(BUF0, 0x0B, I2HI)
CreateByteField(BUF0, 0x0C, I2RL)
CreateByteField(BUF0, 0x0D, I2RH)
CreateByteField(BUF0, 0x11, IRQL)
CreateByteField(BUF0, 0x12, IRQH)
CreateByteField(BUF0, 0x14, DMAC)
Store(READ, 0x00)
0x25
0xFF
Local0
Store(Local0, Local1)
And(Local1, 0xC0, Local1)
ShiftRight(Local1, 0x06, Local1)
ShiftLeft(Local0, 0x02, Local0)
And(Local0, 0xFF, Local0)
Store(Local0, IOLO)
Store(Local1, IOHI)
Store(IOLO, IORL)
Store(IOHI, IORH)
Store(IOHI, Local0)
Add(Local0, 0x04, Local0)
Store(Local0, I2HI)
Store(Local0, I2RH)
Store(IOLO, Local0)
Store(Local0, I2LO)
Store(Local0, I2RL)
Store(READ, 0x00)
0x28
0x0F
Local0
Store(0x01, Local1)
ShiftLeft(Local1, Local0, IRQL)
Store(0x00, IRQH)
Store(READ, 0x00)
0x2C
0x0F
Local0
Store(0x01, Local1)
ShiftLeft(Local1, Local0, DMAC)
Return(BUF0)
}
Name(_PRS, Buffer(0x63) {
0x31, 0x04, 0x47, 0x01, 0xF8, 0x02, 0xF8, 0x02,
0x01, 0x08, 0x47, 0x01, 0xF8, 0x06, 0xF8, 0x06,
0x01, 0x08, 0x22, 0x18, 0x00, 0x2A, 0x0A, 0x00,
0x31, 0x04, 0x47, 0x01, 0xF8, 0x03, 0xF8, 0x03,
0x01, 0x08, 0x47, 0x01, 0xF8, 0x07, 0xF8, 0x07,
0x01, 0x08, 0x22, 0x18, 0x00, 0x2A, 0x0A, 0x00,
0x31, 0x04, 0x47, 0x01, 0xE8, 0x03, 0xE8, 0x03,
0x01, 0x08, 0x47, 0x01, 0xE8, 0x07, 0xE8, 0x07,
0x01, 0x08, 0x22, 0x18, 0x00, 0x2A, 0x0A, 0x00,
0x31, 0x04, 0x47, 0x01, 0xE8, 0x02, 0xE8, 0x02,
0x01, 0x08, 0x47, 0x01, 0xE8, 0x06, 0xE8, 0x06,
0x01, 0x08, 0x22, 0x18, 0x00, 0x2A, 0x0A, 0x00,
0x38, 0x79, 0x00, })
Method(_DIS, 0x00) {
Store(0x00, FENA)
}
Method(_PS0, 0x00) {
Store(READ, 0x00)
0x02
0xFF
Local0
Or(Local0, 0x80, Local0)
WRIT
0x00
0x02
Local0
Store(READ, 0x00)
0x07
0xFF
Local0
Not(0x20, Local1)
And(Local0, Local1, Local0)
WRIT
0x00
0x07
Local0
}
Method(_PS1, 0x00) {
Store(READ, 0x00)
0x07
0xFF
Local0
Or(Local0, 0x20, Local0)
WRIT
0x00
0x07
Local0
}
Method(_PS3, 0x00) {
Store(READ, 0x00)
0x02
0xFF
Local0
Not(0x80, Local1)
And(Local0, Local1, Local0)
WRIT
0x00
0x02
Local0
}
}
Device(FDC_) {
Name(_HID, 0x0007D041)
Name(_UID, 0x01)
Name(RSRC, Buffer(0x18) {
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x22, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x79, 0x00, })
Method(_STA, 0x00) {
If(LEqual(FDCP, 0x00)) {
Return(0x00)
}
Store(READ, 0x00)
0x20
0xFF
Local0
If(LEqual(Local0, 0x00)) {
Return(0x0D)
}
Else {
Return(0x0F)
}
}
Method(_DIS, 0x00) {
Store(READ, 0x00)
0x00
0xFF
Local0
And(Local0, 0xF7, Local0)
WRIT
0x00
0x00
Local0
WRIT
0x00
0x20
0x00
Store(READ, 0x00)
0x26
0x0F
Local0
WRIT
0x00
0x26
Local0
Store(READ, 0x00)
0x27
0x0F
Local0
WRIT
0x00
0x27
Local0
}
Method(_CRS, 0x00) {
If(LEqual(And(_STA, 0x02, Zero), Zero)) {
Return(RSRC)
}
Name(BUF0, Buffer(0x18) {
0x47, 0x01, 0xF0, 0x03, 0xF0, 0x03, 0x01, 0x06,
0x47, 0x01, 0xF7, 0x03, 0xF7, 0x03, 0x01, 0x01,
0x22, 0x40, 0x00, 0x2A, 0x04, 0x00, 0x79, 0x00, })
CreateByteField(BUF0, 0x02, IOLO)
CreateByteField(BUF0, 0x03, IOHI)
CreateByteField(BUF0, 0x04, IORL)
CreateByteField(BUF0, 0x05, IORH)
CreateByteField(BUF0, 0x0A, DALO)
CreateByteField(BUF0, 0x0B, DAHI)
CreateByteField(BUF0, 0x0C, DRLO)
CreateByteField(BUF0, 0x0D, DRHI)
CreateByteField(BUF0, 0x11, IRQL)
CreateByteField(BUF0, 0x14, DMAV)
Store(READ, 0x00)
0x27
0xF0
Local0
ShiftRight(Local0, 0x04, Local0)
Store(0x01, Local1)
ShiftLeft(Local1, Local0, IRQL)
Store(READ, 0x00)
0x26
0xF0
Local0
ShiftRight(Local0, 0x04, Local0)
Store(0x01, Local1)
ShiftLeft(Local1, Local0, DMAV)
Return(BUF0)
}
Method(_SRS, 0x01) {
CreateByteField(Arg0, 0x02, IOLO)
CreateByteField(Arg0, 0x03, IOHI)
CreateWordField(Arg0, 0x11, IRQL)
CreateByteField(Arg0, 0x14, DMAV)
WRIT
0x00
0x20
0x00
FindSetRightBit(IRQL, Local0)
Decrement(Local0)
ShiftLeft(Local0, 0x04, Local0)
Store(READ, 0x00)
0x27
0x0F
Local1
Or(Local0, Local1, Local0)
WRIT
0x00
0x27
Local0
FindSetRightBit(DMAV, Local0)
Decrement(Local0)
ShiftLeft(Local0, 0x04, Local0)
Store(READ, 0x00)
0x26
0x0F
Local1
Or(Local0, Local1, Local0)
WRIT
0x00
0x26
Local0
Store(IOLO, Local0)
ShiftRight(Local0, 0x04, Local0)
ShiftLeft(Local0, 0x02, Local0)
Store(IOHI, Local1)
ShiftLeft(Local1, 0x06, Local1)
Or(Local0, Local1, Local0)
WRIT
0x00
0x20
Local0
Store(READ, 0x00)
0x00
0xFF
Local0
Or(Local0, 0x08, Local0)
WRIT
0x00
0x00
Local0
Store(READ, 0x00)
0x07
0xFF
Local0
Not(0x80, Local1)
And(Local0, Local1, Local0)
WRIT
0x00
0x07
Local0
}
Name(_PRS, Buffer(0x1B) {
0x31, 0x04, 0x47, 0x01, 0xF0, 0x03, 0xF0, 0x03,
0x01, 0x06, 0x47, 0x01, 0xF7, 0x03, 0xF7, 0x03,
0x01, 0x01, 0x22, 0x40, 0x00, 0x2A, 0x04, 0x00,
0x38, 0x79, 0x00, })
Method(_PS0, 0x00) {
Store(READ, 0x00)
0x00
0xFF
Local0
Not(0x08, Local1)
And(Local0, Local1, Local0)
Or(Local0, 0x08, Local0)
WRIT
0x00
0x00
Local0
Store(READ, 0x00)
0x07
0xFF
Local0
Not(0x80, Local1)
And(Local0, Local1, Local0)
WRIT
0x00
0x07
Local0
}
Method(_PS2, 0x00) {
Store(READ, 0x00)
0x07
0xFF
Local0
Not(0x80, Local1)
And(Local0, Local1, Local0)
Or(Local0, 0x80, Local0)
WRIT
0x00
0x07
Local0
}
Method(_PS3, 0x00) {
Store(READ, 0x00)
0x00
0xFF
Local0
Not(0x08, Local1)
And(Local0, Local1, Local0)
WRIT
0x00
0x00
Local0
}
}
Device(LPT_) {
Name(_HID, 0x0004D041)
Name(_UID, 0x01)
Name(Z002, 0x01)
Method(_STA, 0x00) {
If(LEqual(Z002, 0x01)) {
Store(READ, 0x00)
0x01
0x04
Local0
If(LEqual(Local0, 0x00)) {
Return(0x00)
}
}
Store(READ, 0x00)
0x01
0x08
Local0
If(LEqual(Local0, 0x00)) {
Return(0x00)
}
Store(READ, 0x00)
0x23
0xC0
Local0
If(LEqual(Local0, 0x00)) {
Return(0x0D)
}
Else {
Return(0x0F)
}
}
Method(_SRS, 0x01) {
CreateByteField(Arg0, 0x02, IOLO)
CreateByteField(Arg0, 0x03, IOHI)
CreateByteField(Arg0, 0x09, IRQL)
WRIT
0x00
0x23
0x00
FindSetRightBit(IRQL, Local0)
If(Local0) {
Decrement(Local0)
Store(READ, 0x00)
0x27
0xF0
Local1
Or(Local0, Local1, Local0)
WRIT
0x00
0x27
Local0
}
Else {
Store(READ, 0x00)
0x27
0xF0
Local0
WRIT
0x00
0x27
Local0
}
Store(IOLO, Local0)
ShiftRight(Local0, 0x02, Local0)
Store(IOHI, Local1)
ShiftLeft(Local1, 0x06, Local1)
Or(Local0, Local1, Local0)
WRIT
0x00
0x23
Local0
Store(READ, 0x00)
0x01
0xFF
Local0
Or(Local0, 0x0C, Local0)
WRIT
0x00
0x01
Local0
Store(0x01, Z002)
}
Method(_CRS, 0x00) {
Name(BUF0, Buffer(0x0D) {
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08,
0x22, 0x00, 0x00, 0x79, 0x00, })
CreateByteField(BUF0, 0x02, IOLO)
CreateByteField(BUF0, 0x03, IOHI)
CreateByteField(BUF0, 0x04, IORL)
CreateByteField(BUF0, 0x05, IORH)
CreateByteField(BUF0, 0x07, LNA1)
CreateByteField(BUF0, 0x09, IRQL)
Store(READ, 0x00)
0x23
0xFF
Local0
Store(Local0, Local1)
And(Local1, 0xC0, Local1)
ShiftRight(Local1, 0x06, Local1)
And(Local0, 0x3F, Local0)
ShiftLeft(Local0, 0x02, Local0)
Store(Local0, IOLO)
Store(Local1, IOHI)
Store(IOLO, IORL)
Store(IOHI, IORH)
If(Local0) {
If(LEqual(Local0, 0xBC)) {
Store(0x04, LNA1)
}
Else {
Store(0x08, LNA1)
}
}
Else {
Store(0x00, LNA1)
}
If(Local0) {
Store(READ, 0x00)
0x27
0xFF
Local0
And(Local0, 0x0F, Local0)
Store(0x01, Local1)
ShiftLeft(Local1, Local0, IRQL)
}
Return(BUF0)
}
Name(_PRS, Buffer(0x2A) {
0x31, 0x00, 0x47, 0x01, 0x78, 0x03, 0x78, 0x03,
0x01, 0x08, 0x22, 0xA0, 0x00, 0x31, 0x05, 0x47,
0x01, 0x78, 0x02, 0x78, 0x02, 0x01, 0x08, 0x22,
0xA0, 0x00, 0x31, 0x0A, 0x47, 0x01, 0xBC, 0x03,
0xBC, 0x03, 0x01, 0x04, 0x22, 0xA0, 0x00, 0x38,
0x79, 0x00, })
Method(_DIS, 0x00) {
WRIT
0x00
0x23
0x00
Store(READ, 0x00)
0x27
0xFF
Local0
And(Local0, 0xF0, Local0)
WRIT
0x00
0x27
Local0
Store(READ, 0x00)
0x01
0xFF
Local0
And(Local0, 0xFB, Local0)
WRIT
0x00
0x01
Local0
Store(0x00, Z002)
}
Method(_PS3, 0x00) {
Store(READ, 0x00)
0x01
0xFF
Local0
Not(0x04, Local1)
And(Local0, Local1, Local0)
WRIT
0x00
0x01
Local0
Store(0x00, Z002)
}
Method(_PS0, 0x00) {
Store(READ, 0x00)
0x01
0xFF
Local0
Not(0x04, Local1)
And(Local0, Local1, Local0)
Or(Local0, 0x04, Local0)
WRIT
0x00
0x01
Local0
Store(0x01, Z002)
Store(READ, 0x00)
0x07
0xFF
Local0
Not(0x10, Local1)
And(Local0, Local1, Local0)
WRIT
0x00
0x07
Local0
}
Method(_PS2, 0x00) {
Store(READ, 0x00)
0x07
0xFF
Local0
Not(0x10, Local1)
And(Local0, Local1, Local0)
Or(Local0, 0x10, Local0)
WRIT
0x00
0x07
Local0
}
}
Device(LPBI) {
Name(_HID, 0x0004D041)
Name(_UID, 0x02)
Name(Z003, 0x01)
Method(_STA, 0x00) {
If(LEqual(Z003, 0x01)) {
Store(READ, 0x00)
0x01
0x04
Local0
If(LEqual(Local0, 0x00)) {
Return(0x00)
}
}
Store(READ, 0x00)
0x01
0x08
Local0
If(LNot(LEqual(Local0, 0x00))) {
Return(0x00)
}
Store(READ, 0x00)
0x04
0x03
Local0
If(LNot(LEqual(Local0, 0x00))) {
Return(0x00)
}
Store(READ, 0x00)
0x23
0xC0
Local0
If(LEqual(Local0, 0x00)) {
Return(0x0D)
}
Else {
Return(0x0F)
}
}
Method(_SRS, 0x01) {
CreateByteField(Arg0, 0x02, IOLO)
CreateByteField(Arg0, 0x03, IOHI)
CreateByteField(Arg0, 0x09, IRQL)
WRIT
0x00
0x23
0x00
FindSetRightBit(IRQL, Local0)
If(Local0) {
Decrement(Local0)
Store(READ, 0x00)
0x27
0xF0
Local1
Or(Local0, Local1, Local0)
WRIT
0x00
0x27
Local0
}
Else {
Store(READ, 0x00)
0x27
0xF0
Local0
WRIT
0x00
0x27
Local0
}
Store(IOLO, Local0)
ShiftRight(Local0, 0x02, Local0)
Store(IOHI, Local1)
ShiftLeft(Local1, 0x06, Local1)
Or(Local0, Local1, Local0)
WRIT
0x00
0x23
Local0
Store(READ, 0x00)
0x04
0xFC
Local0
WRIT
0x00
0x04
Local0
Store(READ, 0x00)
0x01
0xFF
Local0
Or(Local0, 0x04, Local0)
And(Local0, 0xF7, Local0)
WRIT
0x00
0x01
Local0
Store(0x01, Z003)
}
Method(_CRS, 0x00) {
Name(BUF0, Buffer(0x0D) {
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08,
0x22, 0x00, 0x00, 0x79, 0x00, })
CreateByteField(BUF0, 0x02, IOLO)
CreateByteField(BUF0, 0x03, IOHI)
CreateByteField(BUF0, 0x04, IORL)
CreateByteField(BUF0, 0x05, IORH)
CreateByteField(BUF0, 0x07, LNA1)
CreateByteField(BUF0, 0x09, IRQL)
Store(READ, 0x00)
0x23
0xFF
Local0
Store(Local0, Local1)
And(Local1, 0xC0, Local1)
ShiftRight(Local1, 0x06, Local1)
And(Local0, 0x3F, Local0)
ShiftLeft(Local0, 0x02, Local0)
Store(Local0, IOLO)
Store(Local1, IOHI)
Store(IOLO, IORL)
Store(IOHI, IORH)
If(Local0) {
If(LEqual(Local0, 0xBC)) {
Store(0x04, LNA1)
}
Else {
Store(0x08, LNA1)
}
}
Else {
Store(0x00, LNA1)
}
If(Local0) {
Store(READ, 0x00)
0x27
0xFF
Local0
And(Local0, 0x0F, Local0)
Store(0x01, Local1)
ShiftLeft(Local1, Local0, IRQL)
}
Return(BUF0)
}
Name(_PRS, Buffer(0x2A) {
0x31, 0x00, 0x47, 0x01, 0x78, 0x03, 0x78, 0x03,
0x01, 0x08, 0x22, 0xA0, 0x00, 0x31, 0x05, 0x47,
0x01, 0x78, 0x02, 0x78, 0x02, 0x01, 0x08, 0x22,
0xA0, 0x00, 0x31, 0x0A, 0x47, 0x01, 0xBC, 0x03,
0xBC, 0x03, 0x01, 0x04, 0x22, 0xA0, 0x00, 0x38,
0x79, 0x00, })
Method(_DIS, 0x00) {
WRIT
0x00
0x23
0x00
Store(READ, 0x00)
0x27
0xFF
Local0
And(Local0, 0xF0, Local0)
WRIT
0x00
0x27
Local0
Store(READ, 0x00)
0x01
0xFF
Local0
And(Local0, 0xFB, Local0)
WRIT
0x00
0x01
Local0
Store(0x00, Z003)
}
Method(_PS3, 0x00) {
Store(READ, 0x00)
0x01
0xFF
Local0
Not(0x04, Local1)
And(Local0, Local1, Local0)
WRIT
0x00
0x01
Local0
Store(0x00, Z003)
}
Method(_PS0, 0x00) {
Store(READ, 0x00)
0x01
0xFF
Local0
Not(0x04, Local1)
And(Local0, Local1, Local0)
Or(Local0, 0x04, Local0)
WRIT
0x00
0x01
Local0
Store(0x01, Z003)
Store(READ, 0x00)
0x07
0xFF
Local0
Not(0x10, Local1)
And(Local0, Local1, Local0)
WRIT
0x00
0x07
Local0
}
Method(_PS2, 0x00) {
Store(READ, 0x00)
0x07
0xFF
Local0
Not(0x10, Local1)
And(Local0, Local1, Local0)
Or(Local0, 0x10, Local0)
WRIT
0x00
0x07
Local0
}
}
Device(ECP_) {
Name(_HID, 0x0104D041)
Name(Z004, 0x01)
Method(_STA, 0x00) {
If(LEqual(Z004, 0x01)) {
Store(READ, 0x00)
0x01
0x04
Local0
If(LEqual(Local0, 0x00)) {
Return(0x00)
}
}
Store(READ, 0x00)
0x01
0x08
Local0
If(LNot(LEqual(Local0, 0x00))) {
Return(0x00)
}
Store(READ, 0x00)
0x04
0x03
Local0
If(LNot(LEqual(Local0, 0x02))) {
Return(0x00)
}
Store(READ, 0x00)
0x23
0xC0
Local0
If(LEqual(Local0, 0x00)) {
Return(0x0D)
}
Else {
Return(0x0F)
}
}
Method(_SRS, 0x01) {
CreateByteField(Arg0, 0x02, IOLO)
CreateByteField(Arg0, 0x03, IOHI)
CreateByteField(Arg0, 0x11, IRQL)
CreateByteField(Arg0, 0x14, DMAC)
WRIT
0x00
0x23
0x00
FindSetRightBit(IRQL, Local0)
If(Local0) {
Decrement(Local0)
Store(READ, 0x00)
0x27
0xF0
Local1
Or(Local0, Local1, Local0)
WRIT
0x00
0x27
Local0
}
Else {
Store(READ, 0x00)
0x27
0xF0
Local0
WRIT
0x00
0x27
Local0
}
Store(IOLO, Local0)
ShiftRight(Local0, 0x02, Local0)
Store(IOHI, Local1)
ShiftLeft(Local1, 0x06, Local1)
Or(Local0, Local1, Local0)
WRIT
0x00
0x23
Local0
FindSetRightBit(DMAC, Local0)
If(Local0) {
Decrement(Local0)
Store(READ, 0x00)
0x26
0xF0
Local1
Or(Local0, Local1, Local0)
WRIT
0x00
0x26
Local0
}
Else {
Store(READ, 0x00)
0x26
0xF0
Local0
WRIT
0x00
0x26
Local0
}
Store(READ, 0x00)
0x04
0xFC
Local0
Or(Local0, 0x02, Local0)
WRIT
0x00
0x04
Local0
Store(READ, 0x00)
0x01
0xFF
Local0
Or(Local0, 0x04, Local0)
And(Local0, 0xF7, Local0)
WRIT
0x00
0x01
Local0
Store(0x01, Z004)
}
Method(_CRS, 0x00) {
Name(BUF0, Buffer(0x18) {
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x08, 0x04,
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x08, 0x04,
0x22, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x79, 0x00, })
CreateByteField(BUF0, 0x02, IOLO)
CreateByteField(BUF0, 0x03, IOHI)
CreateByteField(BUF0, 0x04, IORL)
CreateByteField(BUF0, 0x05, IORH)
CreateByteField(BUF0, 0x07, LNA1)
CreateByteField(BUF0, 0x0A, DALO)
CreateByteField(BUF0, 0x0B, DAHI)
CreateByteField(BUF0, 0x0C, DRLO)
CreateByteField(BUF0, 0x0D, DRHI)
CreateByteField(BUF0, 0x0F, LNA2)
CreateByteField(BUF0, 0x11, IRQL)
CreateByteField(BUF0, 0x14, DMAC)
Store(READ, 0x00)
0x23
0xFF
Local0
Store(Local0, Local1)
And(Local1, 0xC0, Local1)
ShiftRight(Local1, 0x06, Local1)
And(Local0, 0x3F, Local0)
ShiftLeft(Local0, 0x02, Local0)
Store(Local0, IOLO)
Store(Local1, IOHI)
Store(IOLO, IORL)
Store(IOHI, IORH)
Add(Local1, 0x04, Local1)
Store(IOLO, DALO)
Store(Local1, DAHI)
Store(DALO, DRLO)
Store(DAHI, DRHI)
If(LEqual(Local0, 0x00)) {
Store(0x00, LNA1)
Store(0x00, LNA2)
}
If(Local0) {
Store(READ, 0x00)
0x27
0xFF
Local0
And(Local0, 0x0F, Local0)
Store(0x01, Local1)
ShiftLeft(Local1, Local0, IRQL)
}
If(Local0) {
Store(READ, 0x00)
0x26
0xFF
Local0
And(Local0, 0x0F, Local0)
Store(0x01, Local1)
ShiftLeft(Local1, Local0, DMAC)
}
Return(BUF0)
}
Name(_PRS, Buffer(0x4B) {
0x31, 0x00, 0x47, 0x01, 0x78, 0x03, 0x78, 0x03,
0x08, 0x04, 0x47, 0x01, 0x78, 0x07, 0x78, 0x07,
0x08, 0x04, 0x22, 0xA0, 0x00, 0x2A, 0x0A, 0x00,
0x31, 0x05, 0x47, 0x01, 0x78, 0x02, 0x78, 0x02,
0x08, 0x04, 0x47, 0x01, 0x78, 0x06, 0x78, 0x06,
0x08, 0x04, 0x22, 0xA0, 0x00, 0x2A, 0x0A, 0x00,
0x31, 0x0A, 0x47, 0x01, 0xBC, 0x03, 0xBC, 0x03,
0x08, 0x04, 0x47, 0x01, 0xBC, 0x07, 0xBC, 0x07,
0x08, 0x04, 0x22, 0xA0, 0x00, 0x2A, 0x0A, 0x00,
0x38, 0x79, 0x00, })
Method(_DIS, 0x00) {
WRIT
0x00
0x23
0x00
Store(READ, 0x00)
0x27
0xFF
Local0
And(Local0, 0xF0, Local0)
WRIT
0x00
0x27
Local0
Store(READ, 0x00)
0x01
0xFF
Local0
And(Local0, 0xFB, Local0)
WRIT
0x00
0x01
Local0
Store(0x00, Z004)
}
Method(_PS3, 0x00) {
Store(READ, 0x00)
0x01
0xFF
Local0
Not(0x04, Local1)
And(Local0, Local1, Local0)
WRIT
0x00
0x01
Local0
Store(0x00, Z004)
}
Method(_PS0, 0x00) {
Store(READ, 0x00)
0x01
0xFF
Local0
Not(0x04, Local1)
And(Local0, Local1, Local0)
Or(Local0, 0x04, Local0)
WRIT
0x00
0x01
Local0
Store(0x01, Z004)
Store(READ, 0x00)
0x07
0xFF
Local0
Not(0x10, Local1)
And(Local0, Local1, Local0)
WRIT
0x00
0x07
Local0
}
Method(_PS2, 0x00) {
Store(READ, 0x00)
0x07
0xFF
Local0
Not(0x10, Local1)
And(Local0, Local1, Local0)
Or(Local0, 0x10, Local0)
WRIT
0x00
0x07
Local0
}
}
Device(EPP_) {
Name(_HID, 0x0004D041)
Name(_UID, 0x03)
Name(Z005, 0x01)
Method(_STA, 0x00) {
If(LEqual(Z005, 0x01)) {
Store(READ, 0x00)
0x01
0x04
Local0
If(LEqual(Local0, 0x00)) {
Return(0x00)
}
}
Store(READ, 0x00)
0x01
0x08
Local0
If(LNot(LEqual(Local0, 0x00))) {
Return(0x00)
}
Store(READ, 0x00)
0x04
0x03
Local0
If(LNot(LEqual(Local0, 0x01))) {
Return(0x00)
}
Store(READ, 0x00)
0x23
0xC0
Local0
If(LEqual(Local0, 0x00)) {
Return(0x0D)
}
Else {
Return(0x0F)
}
}
Method(_SRS, 0x01) {
CreateByteField(Arg0, 0x02, IOLO)
CreateByteField(Arg0, 0x03, IOHI)
CreateByteField(Arg0, 0x09, IRQL)
WRIT
0x00
0x23
0x00
FindSetRightBit(IRQL, Local0)
If(Local0) {
Decrement(Local0)
Store(READ, 0x00)
0x27
0xF0
Local1
Or(Local0, Local1, Local0)
WRIT
0x00
0x27
Local0
}
Else {
Store(READ, 0x00)
0x27
0xF0
Local0
WRIT
0x00
0x27
Local0
}
Store(IOLO, Local0)
ShiftRight(Local0, 0x02, Local0)
Store(IOHI, Local1)
ShiftLeft(Local1, 0x06, Local1)
Or(Local0, Local1, Local0)
WRIT
0x00
0x23
Local0
Store(READ, 0x00)
0x04
0xFC
Local0
Or(Local0, 0x01, Local0)
And(Local0, 0xBF, Local0)
WRIT
0x00
0x04
Local0
Store(READ, 0x00)
0x01
0xFF
Local0
Or(Local0, 0x04, Local0)
And(Local0, 0xF7, Local0)
WRIT
0x00
0x01
Local0
Store(0x01, Z005)
}
Method(_CRS, 0x00) {
Name(BUF0, Buffer(0x0D) {
0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08,
0x22, 0x00, 0x00, 0x79, 0x00, })
CreateByteField(BUF0, 0x02, IOLO)
CreateByteField(BUF0, 0x03, IOHI)
CreateByteField(BUF0, 0x04, IORL)
CreateByteField(BUF0, 0x05, IORH)
CreateByteField(BUF0, 0x07, LNA1)
CreateByteField(BUF0, 0x09, IRQL)
Store(READ, 0x00)
0x23
0xFF
Local0
Store(Local0, Local1)
And(Local1, 0xC0, Local1)
ShiftRight(Local1, 0x06, Local1)
And(Local0, 0x3F, Local0)
ShiftLeft(Local0, 0x02, Local0)
Store(Local0, IOLO)
Store(Local1, IOHI)
Store(IOLO, IORL)
Store(IOHI, IORH)
If(Local0) {
If(LEqual(Local0, 0xBC)) {
Store(0x04, LNA1)
}
Else {
Store(0x08, LNA1)
}
}
Else {
Store(0x00, LNA1)
}
If(Local0) {
Store(READ, 0x00)
0x27
0xFF
Local0
And(Local0, 0x0F, Local0)
Store(0x01, Local1)
ShiftLeft(Local1, Local0, IRQL)
}
Return(BUF0)
}
Name(_PRS, Buffer(0x2A) {
0x31, 0x00, 0x47, 0x01, 0x78, 0x03, 0x78, 0x03,
0x01, 0x08, 0x22, 0xA0, 0x00, 0x31, 0x05, 0x47,
0x01, 0x78, 0x02, 0x78, 0x02, 0x01, 0x08, 0x22,
0xA0, 0x00, 0x31, 0x0A, 0x47, 0x01, 0xBC, 0x03,
0xBC, 0x03, 0x01, 0x04, 0x22, 0xA0, 0x00, 0x38,
0x79, 0x00, })
Method(_DIS, 0x00) {
WRIT
0x00
0x23
0x00
Store(READ, 0x00)
0x27
0xFF
Local0
And(Local0, 0xF0, Local0)
WRIT
0x00
0x27
Local0
Store(READ, 0x00)
0x01
0xFF
Local0
And(Local0, 0xFB, Local0)
WRIT
0x00
0x01
Local0
Store(0x00, Z005)
}
Method(_PS3, 0x00) {
Store(READ, 0x00)
0x01
0xFF
Local0
Not(0x04, Local1)
And(Local0, Local1, Local0)
WRIT
0x00
0x01
Local0
Store(0x00, Z005)
}
Method(_PS0, 0x00) {
Store(READ, 0x00)
0x01
0xFF
Local0
Not(0x04, Local1)
And(Local0, Local1, Local0)
Or(Local0, 0x04, Local0)
WRIT
0x00
0x01
Local0
Store(0x01, Z005)
Store(READ, 0x00)
0x07
0xFF
Local0
Not(0x10, Local1)
And(Local0, Local1, Local0)
WRIT
0x00
0x07
Local0
}
Method(_PS2, 0x00) {
Store(READ, 0x00)
0x07
0xFF
Local0
Not(0x10, Local1)
And(Local0, Local1, Local0)
Or(Local0, 0x10, Local0)
WRIT
0x00
0x07
Local0
}
}
}
Device(ACAD) {
Name(_HID, AP00UR_1==ield(ERAM, 0x10) {
0x00, 0x170,
RSMT, 0x10,
0x00, 0x80,
0x00, 0x8,
CSPR, 0x1,
0x00, 0xF7,
SMPR, 0x8,
SMST, 0x8,
SMAD, 0x8,
SMCM, 0x8,
SMD0, 0x100,
BCNT, 0x8,
SMAA, 0x8,
0x00, 0x50,
CHGM, 0x10,
CHGS, 0x10,
CHGC, 0x10,
CHGV, 0x10,
CHGA, 0x10,
BAL0, 0x1,
BAL1, 0x1,
BAL2, 0x1,
BAL3, 0x1,
0x00, 0xC,
BEEP, 0x1,
FAN1, 0x1,
FAN2, 0x1,
CRT_, 0x1,
EXFD, 0x1,
PHDD, 0x1,
SHDD, 0x1,
FDD_, 0x1,
SBTN, 0x1,
VIDO, 0x1,
VOLD, 0x1,
VOLU, 0x1,
MUTE, 0x1,
CONT, 0x1,
BRGT, 0x1,
HBTN, 0x1,
S4S_, 0x1,
SKEY, 0x1,
BKEY, 0x1,
0x00, 0x25,
S0LD, 0x1,
S3LD, 0x1,
VGAQ, 0x1,
PCMQ, 0x1,
PCMR, 0x1,
ADP_, 0x1,
SYS6, 0x1,
SYS7, 0x1,
PWAK, 0x1,
MWAK, 0x1,
LWAK, 0x1,
0x00, 0x5,
FOT_, 0x8,
FSD1, 0x8,
FSD2, 0x8,
0x00, 0x40,
CTMP, 0x8,
0x00, 0x38,
BTDT, 0x1,
BTPW, 0x1,
BTDS, 0x1,
BTPS, 0x1,
BTSW, 0x1,
0x00, 0x3,
BRTS, 0x8,
0x00, 0x8,
WLAT, 0x1,
BTAT, 0x1,
WLEX, 0x1,
BTEX, 0x1,
KLSW, 0x1,
0x00, 0x3,
PJDD, 0x8,
0x00, 0x18,
0x00, 0x4,
BMF0, 0x3,
BTY0, 0x1,
BST0, 0x8,
BRC0, 0x10,
BSN0, 0x10,
BPV0, 0x10,
BDV0, 0x10,
BDC0, 0x10,
BFC0, 0x10,
GAU0, 0x8,
BTCC, 0x8,
0x00, 0x4,
BMF1, 0x3,
BTY1, 0x1,
BST1, 0x8,
BRC1, 0x10,
BSN1, 0x10,
BPV1, 0x10,
BDV1, 0x10,
BDC1, 0x10,
BFC1, 0x10,
GAU1, 0x8,
}
Method(_Q11, 0x00) {
Store(===UR_1==D RM¤FD TP¤TP0HO ?
¤HN
hDT? ?
¤TR
[KBTHDA UD_C_B_TPILCE0GUbb(p?BT, Debug)
Sleep(0x03E8)
Notify(\_SB_.PCI0.LPCB.BAT1, 0x81)
Sleep(0x03E8)
Notify(\_SB_.PCI0.LPCB.BAT1, 0x80)
}
Method(_Q30, 0x00) {
Store(===UR_0==1SUE!PWÂ ?SP PWÂ h
UE?p(LEqual(Arg0, 0x00)) {
Return(THEN)
}
Else {
If(LEqual(Arg0, 0x01)) {
Return(DUTY)
}
Else {
If(LEqual(Arg0, 0x02)) {
Return(TTHR)
}
Else {
Return(0xFF)
}
}
}
}
}
Device(BAT1) {
Name(_HID, 0x0A0CD041)
Name(_UID, 0x01)
Name(_PCL, Package(0x01) {
\_SB_
})
Method(_STA, 0x00) {
If(LAnd(ECOK, LEqual(ECDY, 0x00))) {
If(\_SB_.PCI0.LPCB.EC0_.BAL0) {
Return(0x1F)
}
Else {
Return(0x0F)
}
}
Else {
Return(0x1F)
}
}
Method(_BIF, 0x00) {
Name(STAT, Package(0x0D) {
0x01
0x0FA0
0x0FA0
0x01
0x39D0
0x01A4
0x9C
0x0108
0x0EC4
PBS0IRC2IRC4IR?dRD_D
GM¤
35Q
iIn
OHB?DC
[OIERTSCSTSIDAY, 0x00))) {
Store(\_SB_.PCI0.LPCB.EC0_.BST0, Local0)
Store(\_SB_.PCI0.LPCB.EC0_.GAU0, Local2)
}
Multiply(Local2, 0x28, Local2)
Store(Local0, Index(PBST, 0x00))
Zero
Store(0x00, Index(PBST, 0x01))
Zero
Store(Local2, Index(PBST, 0x02))
Zero
Return(PBST)
}
}
}
Device(USB0) {
Name(_ADR, 0x001D0000)
OperationRegion(U0CS, 0x02, 0xC4, 0x04)
Field(U0CS, 0x03) {
U0EN, 0x2,
}
Method(_PRW, 0x00) {
If(LEqual(OSTP, 0x03)) {
Return(Package(0x02) {
0x03
0x01
})
}
Else {
Return(Package(0x02) {
0x03
0x03
})
}
}
Method(_PSW, 0x01) {
If(Arg0) {
Store(0x03, U0EN)
}
Else {
Store(0x00, U0EN)
}
}
}
Device(USB1) {
Name(_ADR, 0x001D0001)
OperationRegion(U1CS, 0x02, 0xC4, 0x04)
Field(U1CS, 0x03) {
U1EN, 0x2,
}
Method(_PRW, 0x00) {
If(LEqual(OSTP, 0x03)) {
Return(Package(0x02) {
0x04
0x01
})
}
Else {
Return(Package(0x02) {
0x04
0x03
})
}
}
Method(_PSW, 0x01) {
If(Arg0) {
Store(0x03, U1EN)
}
Else {
Store(0x00, U1EN)
}
}
}
Device(USB2) {
Name(_ADR, 0x001D0002)
OperationRegion(U2CS, 0x02, 0xC4, 0x04)
Field(U2CS, 0x03) {
U2EN, 0x2,
}
Method(_PRW, 0x00) {
If(LEqual(OSTP, 0x03)) {
Return(Package(0x02) {
0x0C
0x01
})
}
Else {
Return(Package(0x02) {
0x0C
0x03
})
}
}
Method(_PSW, 0x01) {
If(Arg0) {
Store(0x03, U2EN)
}
Else {
Store(0x00, U2EN)
}
}
}
Device(IDEC) {
Name(_ADR, 0x001F0001)
OperationRegion(IDEC, 0x02, 0x40, 0x18)
Field(IDEC, 0x03) {
PRIT, 0x10,
SECT, 0x10,
PSIT, 0x4,
SSIT, 0x4,
0x00, 0x18,
SDMA, 0x4,
0x00, 0xC,
SDT0, 0x2,
0x00, 0x2,
SDT1, 0x2,
0x00, 0x2,
SDT2, 0x2,
0x00, 0x2,
SDT3, 0x2,
0x00, 0x42,
ICR0, 0x4,
ICR1, 0x4,
ICR2, 0x4,
ICR3, 0x4,
ICR4, 0x4,
ICR5, 0x4,
}
Device(PRID) {
Name(_ADR, 0x00)
Method(_GTM, 0x00) {
Return(Buffer(0x14) {
0x78, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
0x78, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
0x1F, 0x00, 0x00, 0x00, })
Name(PBUF, Buffer(0x14) {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, })
CreateDWordField(PBUF, 0x00, PIO0)
CreateDWordField(PBUF, 0x04, DMA0)
CreateDWordField(PBUF, 0x08, PIO1)
CreateDWordField(PBUF, 0x0C, DMA1)
CreateDWordField(PBUF, 0x10, FLAG)
Store(GETP, PRIT)
PIO0
Store(GETD, And(SDMA, 0x01, Zero))
And(ICR3, 0x01, Zero)
And(ICR0, 0x01, Zero)
SDT0
DMA0
If(LEqual(DMA0, 0xFFFFFFFF)) {
Store(PIO0, DMA0)
}
If(And(PRIT, 0x4000, Zero)) {
If(LEqual(And(PRIT, 0x90, Zero), 0x80)) {
Store(0x0384, PIO1)
}
Else {
Store(GETT, PSIT)
PIO1
}
}
Else {
Store(0xFFFFFFFF, PIO1)
}
Store(GETD, And(SDMA, 0x02, Zero))
And(ICR3, 0x02, Zero)
And(ICR0, 0x02, Zero)
SDT1
DMA1
If(LEqual(DMA1, 0xFFFFFFFF)) {
Store(PIO1, DMA1)
}
Store(GETF, And(SDMA, 0x01, Zero))
And(SDMA, 0x02, Zero)
PRIT
FLAG
Return(PBUF)
}
Method(_STM, 0x03) {
CreateDWordField(Arg0, 0x00, PIO0)
CreateDWordField(Arg0, 0x04, DMA0)
CreateDWordField(Arg0, 0x08, PIO1)
CreateDWordField(Arg0, 0x0C, DMA1)
CreateDWordField(Arg0, 0x10, FLAG)
Store(0x04, ICR2)
If(LEqual(SizeOf(Arg1), 0x0200)) {
And(PRIT, 0x40F0, PRIT)
And(SDMA, 0x0E, SDMA)
Store(0x00, SDT0)
And(ICR0, 0x0E, ICR0)
And(ICR1, 0x0E, ICR1)
And(ICR3, 0x0E, ICR3)
And(ICR5, 0x0E, ICR5)
CreateWordField(Arg1, 0x62, W490)
CreateWordField(Arg1, 0x6A, W530)
CreateWordField(Arg1, 0x7E, W630)
CreateWordField(Arg1, 0x80, W640)
CreateWordField(Arg1, 0xB0, W880)
Or(PRIT, 0x8004, PRIT)
If(LAnd(And(FLAG, 0x02, Zero), And(W490, 0x0800, Zero))) {
Or(PRIT, 0x02, PRIT)
}
Or(PRIT, SETP, PIO0)
W530
W640
PRIT
If(And(FLAG, 0x01, Zero)) {
Or(SDMA, 0x01, SDMA)
Store(SETD, DMA0)
SDT0
If(And(W880, 0x20, Zero)) {
Or(ICR5, 0x01, ICR5)
}
If(And(W880, 0x10, Zero)) {
Or(ICR1, 0x01, ICR1)
}
If(LLess(DMA0, 0x1E)) {
Or(ICR3, 0x01, ICR3)
}
If(LLess(DMA0, 0x3C)) {
Or(ICR0, 0x01, ICR0)
}
}
}
If(LEqual(SizeOf(Arg2), 0x0200)) {
And(PRIT, 0x3F0F, PRIT)
Store(0x00, PSIT)
And(SDMA, 0x0D, SDMA)
Store(0x00, SDT1)
And(ICR0, 0x0D, ICR0)
And(ICR1, 0x0D, ICR1)
And(ICR3, 0x0D, ICR3)
And(ICR5, 0x0D, ICR5)
CreateWordField(Arg2, 0x62, W491)
CreateWordField(Arg2, 0x6A, W531)
CreateWordField(Arg2, 0x7E, W631)
CreateWordField(Arg2, 0x80, W641)
CreateWordField(Arg2, 0xB0, W881)
Or(PRIT, 0x8040, PRIT)
If(LAnd(And(FLAG, 0x08, Zero), And(W491, 0x0800, Zero))) {
Or(PRIT, 0x20, PRIT)
}
If(And(FLAG, 0x10, Zero)) {
Or(PRIT, 0x4000, PRIT)
If(LGreater(PIO1, 0xF0)) {
Or(PRIT, 0x80, PRIT)
}
Else {
Or(PRIT, 0x10, PRIT)
Store(SETT, PIO1)
W531
W641
PSIT
}
}
If(And(FLAG, 0x04, Zero)) {
Or(SDMA, 0x02, SDMA)
Store(SETD, DMA1)
SDT1
If(And(W881, 0x20, Zero)) {
Or(ICR5, 0x02, ICR5)
}
If(And(W881, 0x10, Zero)) {
Or(ICR1, 0x02, ICR1)
}
If(LLess(DMA0, 0x1E)) {
Or(ICR3, 0x02, ICR3)
}
If(LLess(DMA0, 0x3C)) {
Or(ICR0, 0x02, ICR0)
}
}
}
}
Device(P_D0) {
Name(_ADR, 0x00)
Method(_GTF, 0x00) {
Name(PIB0, Buffer(0x0E) {
0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x03,
0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, })
CreateByteField(PIB0, 0x01, PMD0)
CreateByteField(PIB0, 0x08, DMD0)
If(And(PRIT, 0x02, Zero)) {
If(LEqual(And(PRIT, 0x09, Zero), 0x08)) {
Store(0x08, PMD0)
}
Else {
Store(0x0A, PMD0)
ShiftRight(And(PRIT, 0x0300, Zero), 0x08, Local0)
ShiftRight(And(PRIT, 0x3000, Zero), 0x0C, Local1)
Add(Local0, Local1, Local2)
If(LEqual(0x03, Local2)) {
Store(0x0B, PMD0)
}
If(LEqual(0x05, Local2)) {
Store(0x0C, PMD0)
}
}
}
Else {
Store(0x01, PMD0)
}
If(And(SDMA, 0x01, Zero)) {
Store(Or(SDT0, 0x40, Zero), DMD0)
If(And(ICR0, 0x01, Zero)) {
Add(DMD0, 0x02, DMD0)
}
If(And(ICR3, 0x01, Zero)) {
Store(0x45, DMD0)
}
}
Else {
Or(Subtract(And(PMD0, 0x07, Zero), 0x02, Zero), 0x20, DMD0)
}
Return(PIB0)
}
}
Device(P_D1) {
Name(_ADR, 0x01)
Method(_GTF, 0x00) {
Name(PIB1, Buffer(0x0E) {
0x03, 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, 0x03,
0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, })
CreateByteField(PIB1, 0x01, PMD1)
CreateByteField(PIB1, 0x08, DMD1)
If(And(PRIT, 0x20, Zero)) {
If(LEqual(And(PRIT, 0x90, Zero), 0x80)) {
Store(0x08, PMD1)
}
Else {
Add(And(PSIT, 0x03, Zero), ShiftRight(And(PSIT, 0x0C, Zero), 0x02, Zero), Local0)
If(LEqual(0x05, Local0)) {
Store(0x0C, PMD1)
}
Else {
If(LEqual(0x03, Local0)) {
Store(0x0B, PMD1)
}
Else {
Store(0x0A, PMD1)
}
}
}
}
Else {
Store(0x01, PMD1)
}
If(And(SDMA, 0x02, Zero)) {
Store(Or(SDT1, 0x40, Zero), DMD1)
If(And(ICR0, 0x02, Zero)) {
Add(DMD1, 0x02, DMD1)
}
If(And(ICR3, 0x02, Zero)) {
Store(0x45, DMD1)
}
}
Else {
Or(Subtract(And(PMD1, 0x07, Zero), 0x02, Zero), 0x20, DMD1)
}
Return(PIB1)
}
}
Method(_PS0, 0x00){}
Method(_PS3, 0x00){}
}
Device(SECD) {
Name(_ADR, 0x01)
Method(_GTM, 0x00) {
Name(SBUF, Buffer(0x14) {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, })
CreateDWordField(SBUF, 0x00, PIO0)
CreateDWordField(SBUF, 0x04, DMA0)
CreateDWordField(SBUF, 0x08, PIO1)
CreateDWordField(SBUF, 0x0C, DMA1)
CreateDWordField(SBUF, 0x10, FLAG)
Store(GETP, SECT)
PIO0
Store(GETD, And(SDMA, 0x04, Zero))
And(ICR3, 0x04, Zero)
And(ICR0, 0x04, Zero)
SDT2
DMA0
If(LEqual(DMA0, 0xFFFFFFFF)) {
Store(PIO0, DMA0)
}
If(And(SECT, 0x4000, Zero)) {
If(LEqual(And(SECT, 0x90, Zero), 0x80)) {
Store(0x0384, PIO1)
}
Else {
Store(GETT, SSIT)
PIO1
}
}
Else {
Store(0xFFFFFFFF, PIO1)
}
Store(GETD, And(SDMA, 0x08, Zero))
And(ICR3, 0x08, Zero)
And(ICR0, 0x08, Zero)
SDT3
DMA1
If(LEqual(DMA1, 0xFFFFFFFF)) {
Store(PIO1, DMA1)
}
Store(GETF, And(SDMA, 0x04, Zero))
And(SDMA, 0x08, Zero)
SECT
FLAG
Return(SBUF)
}
Method(_STM, 0x03) {
CreateDWordField(Arg0, 0x00, PIO0)
CreateDWordField(Arg0, 0x04, DMA0)
CreateDWordField(Arg0, 0x08, PIO1)
CreateDWordField(Arg0, 0x0C, DMA1)
CreateDWordField(Arg0, 0x10, FLAG)
Store(0x04, ICR2)
If(LEqual(SizeOf(Arg1), 0x0200)) {
And(SECT, 0x40F0, SECT)
And(SDMA, 0x0B, SDMA)
Store(0x00, SDT2)
And(ICR0, 0x0B, ICR0)
And(ICR1, 0x0B, ICR1)
And(ICR3, 0x0B, ICR3)
And(ICR5, 0x0B, ICR5)
CreateWordField(Arg1, 0x62, W490)
CreateWordField(Arg1, 0x6A, W530)
CreateWordField(Arg1, 0x7E, W630)
CreateWordField(Arg1, 0x80, W640)
CreateWordField(Arg1, 0xB0, W880)
Or(SECT, 0x8004, SECT)
If(LAnd(And(FLAG, 0x02, Zero), And(W490, 0x0800, Zero))) {
Or(SECT, 0x02, SECT)
}
Or(SECT, SETP, PIO0)
W530
W640
SECT
If(And(FLAG, 0x01, Zero)) {
Or(SDMA, 0x04, SDMA)
Store(SETD, DMA0)
SDT2
If(And(W880, 0x20, Zero)) {
Or(ICR5, 0x04, ICR5)
}
If(And(W880, 0x10, Zero)) {
Or(ICR1, 0x04, ICR1)
}
If(LLess(DMA0, 0x1E)) {
Or(ICR3, 0x04, ICR3)
}
If(LLess(DMA0, 0x3C)) {
Or(ICR0, 0x04, ICR0)
}
}
}
If(LEqual(SizeOf(Arg2), 0x0200)) {
And(SECT, 0x3F0F, SECT)
Store(0x00, SSIT)
And(SDMA, 0x07, SDMA)
Store(0x00, SDT3)
And(ICR0, 0x07, ICR0)
And(ICR1, 0x07, ICR1)
And(ICR3, 0x07, ICR3)
And(ICR5, 0x07, ICR5)
CreateWordField(Arg2, 0x62, W491)
CreateWordField(Arg2, 0x6A, W531)
CreateWordField(Arg2, 0x7E, W631)
CreateWordField(Arg2, 0x80, W641)
CreateWordField(Arg2, 0xB0, W881)
Or(SECT, 0x8040, SECT)
If(LAnd(And(FLAG, 0x08, Zero), And(W491, 0x0800, Zero))) {
Or(SECT, 0x20, SECT)
}
If(And(FLAG, 0x10, Zero)) {
Or(SECT, 0x4000, SECT)
If(LGreater(PIO1, 0xF0)) {
Or(SECT, 0x80, SECT)
}
Else {
Or(SECT, 0x10, SECT)
Store(SETT, PIO1)
W531
W641
SSIT
}
}
If(And(FLAG, 0x04, Zero)) {
Or(SDMA, 0x08, SDMA)
Store(SETD, DMA1)
SDT3
If(And(W881, 0x20, Zero)) {
Or(ICR5, 0x08, ICR5)
}
If(And(W881, 0x10, Zero)) {
Or(ICR1, 0x08, ICR1)
}
If(LLess(DMA0, 0x1E)) {
Or(ICR3, 0x08, ICR3)
}
If(LLess(DMA0, 0x3C)) {
Or(ICR0, 0x08, ICR0)
}
}
}
}
Device(S_D0) {
Name(_ADR, 0x00)
Method(_GTF, 0x00) {
Name(SIB0, Buffer(0x0E) {
0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x03,
0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, })
CreateByteField(SIB0, 0x01, PMD0)
CreateByteField(SIB0, 0x08, DMD0)
If(And(SECT, 0x02, Zero)) {
If(LEqual(And(SECT, 0x09, Zero), 0x08)) {
Store(0x08, PMD0)
}
Else {
Store(0x0A, PMD0)
ShiftRight(And(SECT, 0x0300, Zero), 0x08, Local0)
ShiftRight(And(SECT, 0x3000, Zero), 0x0C, Local1)
Add(Local0, Local1, Local2)
If(LEqual(0x03, Local2)) {
Store(0x0B, PMD0)
}
If(LEqual(0x05, Local2)) {
Store(0x0C, PMD0)
}
}
}
Else {
Store(0x01, PMD0)
}
If(And(SDMA, 0x04, Zero)) {
Store(Or(SDT2, 0x40, Zero), DMD0)
If(And(ICR0, 0x04, Zero)) {
Add(DMD0, 0x02, DMD0)
}
If(And(ICR3, 0x04, Zero)) {
Store(0x45, DMD0)
}
}
Else {
Or(Subtract(And(PMD0, 0x07, Zero), 0x02, Zero), 0x20, DMD0)
}
Return(SIB0)
}
}
Device(S_D1) {
Name(_ADR, 0x01)
Method(_GTF, 0x00) {
Name(SIB1, Buffer(0x0E) {
0x03, 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, 0x03,
0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, })
CreateByteField(SIB1, 0x01, PMD1)
CreateByteField(SIB1, 0x08, DMD1)
If(And(SECT, 0x20, Zero)) {
If(LEqual(And(SECT, 0x90, Zero), 0x80)) {
Store(0x08, PMD1)
}
Else {
Add(And(SSIT, 0x03, Zero), ShiftRight(And(SSIT, 0x0C, Zero), 0x02, Zero), Local0)
If(LEqual(0x05, Local0)) {
Store(0x0C, PMD1)
}
Else {
If(LEqual(0x03, Local0)) {
Store(0x0B, PMD1)
}
Else {
Store(0x0A, PMD1)
}
}
}
}
Else {
Store(0x01, PMD1)
}
If(And(SDMA, 0x08, Zero)) {
Store(Or(SDT3, 0x40, Zero), DMD1)
If(And(ICR0, 0x08, Zero)) {
Add(DMD1, 0x02, DMD1)
}
If(And(ICR3, 0x08, Zero)) {
Store(0x45, DMD1)
}
}
Else {
Or(Subtract(And(PMD1, 0x07, Zero), 0x02, Zero), 0x20, DMD1)
}
Return(SIB1)
}
}
Method(_PS0, 0x00){}
Method(_PS3, 0x00){}
}
Method(GETP, 0x01) {
If(LEqual(And(Arg0, 0x09, Zero), 0x00)) {
Return(0xFFFFFFFF)
}
If(LEqual(And(Arg0, 0x09, Zero), 0x08)) {
Return(0x0384)
}
ShiftRight(And(Arg0, 0x0300, Zero), 0x08, Local0)
ShiftRight(And(Arg0, 0x3000, Zero), 0x0C, Local1)
Return(Multiply(0x1E, Subtract(0x09, Add(Local0, Local1, Zero), Zero), Zero))
}
Method(GETD, 0x04) {
If(Arg0) {
If(Arg1) {
Return(0x17)
}
If(Arg2) {
Return(Multiply(Subtract(0x04, Arg3, Zero), 0x0F, Zero))
}
Return(Multiply(Subtract(0x04, Arg3, Zero), 0x1E, Zero))
}
Return(0xFFFFFFFF)
}
Method(GETT, 0x01) {
Return(Multiply(0x1E, Subtract(0x09, Add(And(ShiftRight(Arg0, 0x02, Zero), 0x03, Zero), And(Arg0, 0x03, Zero), Zero), Zero), Zero))
}
Method(GETF, 0x03) {
Name(TMPF, 0x00)
If(Arg0) {
Or(TMPF, 0x01, TMPF)
}
If(And(Arg2, 0x02, Zero)) {
Or(TMPF, 0x02, TMPF)
}
If(Arg1) {
Or(TMPF, 0x04, TMPF)
}
If(And(Arg2, 0x20, Zero)) {
Or(TMPF, 0x08, TMPF)
}
If(And(Arg2, 0x4000, Zero)) {
Or(TMPF, 0x10, TMPF)
}
Return(TMPF)
}
Method(SETP, 0x03) {
If(LNot(LLess(Arg0, 0xF0))) {
Return(0x08)
}
Else {
If(And(Arg1, 0x02, Zero)) {
If(LAnd(LNot(LGreater(Arg0, 0x78)), And(Arg2, 0x02, Zero))) {
Return(0x2301)
}
If(LAnd(LNot(LGreater(Arg0, 0xB4)), And(Arg2, 0x01, Zero))) {
Return(0x2101)
}
}
Return(0x1001)
}
}
Method(SETD, 0x01) {
If(LNot(LGreater(Arg0, 0x17))) {
Return(0x01)
}
If(LNot(LGreater(Arg0, 0x1E))) {
Return(0x02)
}
If(LNot(LGreater(Arg0, 0x2D))) {
Return(0x01)
}
If(LNot(LGreater(Arg0, 0x3C))) {
Return(0x02)
}
If(LNot(LGreater(Arg0, 0x5A))) {
Return(0x01)
}
Return(0x00)
}
Method(SETT, 0x03) {
If(And(Arg1, 0x02, Zero)) {
If(LAnd(LNot(LGreater(Arg0, 0x78)), And(Arg2, 0x02, Zero))) {
Return(0x0B)
}
If(LAnd(LNot(LGreater(Arg0, 0xB4)), And(Arg2, 0x01, Zero))) {
Return(0x09)
}
}
Return(0x04)
}
}
Device(SBUS) {
Name(_ADR, 0x001F0003)
}
Device(AUD0) {
Name(_ADR, 0x001F0005)
}
Device(MODM) {
Name(_ADR, 0x001F0006)
Name(_PRW, Package(0x02) {
0x05
0x03
})
}
}
}} |
FACS |
|---|
Firmware ACPI Control Structure -------------------------------------------------------------------------------- Signature : FACS Table length : 64 Byte Hardware signature : Firmware Waking Vector : 00000000h Global Lock : 00000000h Flags : 00000000h (S4BIOS_REQ is not supported) |
CPU |
|---|
================================================================================ Vendor : Intel Corp. Vendor ID String : GenuineIntel CPU Type : OEM Processor Family : 15 Model : 2 Stepping : 7 Signature : 00000F27 FPU Model : Built-in FPU Brand ID : 0FH Supported Processor Features -------------------------------------------------------------------------------- On-Chip FPU Enhanced V86 mode Debugging Extension Page Size Extensions (4MB paging) Time Stamp Counter Model Specific Register Physical Address Extensions Machine Check Exception Compare and Exchange 8 bytes instruction (CMPXCHG8B) Fast System Call Memory Type Range Registers Page Global Enable Machine Check Architecture Conditional Move Instructions (CMOVcc) Page Attribute Table 36-bit Page Size Extension MultiMedia Extensions (MMX) Fast Floating Point Save and Restore Streaming SIMD Extension 3D Now! Extension |
Floppy |
|---|
Floppy Drive(s) Installed : 2 ================================================================================ IRQ Level : 6 DMA Channel : 2 I/O Range : 03F2h-03F6h |
Drive A |
|---|
Drive A ================================================================================ Media type : ATAPI removable media Drive Maximum track number : 79 Maximum sector number : 18 Maximum head number : 1 Diskette Parameter Table Contents -------------------------------------------------------------------------------- Step Rate Time Code : 0Fh Head Unload Time Code : 0Dh Head Load Time Code : 00h Drive Motor Turn-Off Delay : 2035 ms Bytes Per Sector : 512 Sector Per Track : 18 GAP Length For Read/Write : 1Bh Data Transfer Length Code : FFh Format GAP Length : 6Ch Fill Byte For Format : F6h Head Settling Time : 15 ms Motor Startup Time : 625 ms |
Drive B |
|---|
Drive B ================================================================================ Media type : ATAPI removable media Drive Maximum track number : 79 Maximum sector number : 18 Maximum head number : 1 Diskette Parameter Table Contents -------------------------------------------------------------------------------- Step Rate Time Code : 0Fh Head Unload Time Code : 0Dh Head Load Time Code : 00h Drive Motor Turn-Off Delay : 2035 ms Bytes Per Sector : 512 Sector Per Track : 18 GAP Length For Read/Write : 1Bh Data Transfer Length Code : FFh Format GAP Length : 6Ch Fill Byte For Format : F6h Head Settling Time : 15 ms Motor Startup Time : 625 ms |
Video system |
|---|
Video Adapter(s) Found: ================================================================================ Primary : PCI Video Adapter, 16 MB |
PCI Video Adapter |
|---|
PCI Video Adapter
================================================================================
Location : AGP Card
Vendor Id : 1002h (ATI Technologies)
Device Id : 4C59h (PCI Video Adapter)
Class : 00h (VGA Compatible Controller)
Subsystem Vendor ID : 1179h (Toshiba America Info Systems)
Subsystem Device ID : FF00h (info unavailable)
Video System Type : Primary
Video Adapter Type : Super VGA
Video Memory Size : 16 MB
OEM Vendor Name : "ATI Technologies Inc."
OEM Product Name : "R100"
OEM Product Revision : "01.00"
OEM Software Revision : 1.0
OEM String : "ATI MOBILITY RADEON"
VESA Version : 2.0
VESA Power Management Version : 1.0
VESA PM Supported States :
: STANDBY
: SUSPEND
: OFF
VESA Supported Video Modes : 50
+------------------------------------------+
| Number Mode HRes. VRes. Colors |
+------------------------------------------+
0182h Unknown VESA mode
010Dh Graphic 320 200 32K
010Eh Graphic 320 200 64K
010Fh Graphic 320 200 16M
0120h Graphic 1600 1200 256
0192h Unknown VESA mode
0193h Unknown VESA mode
0194h Unknown VESA mode
0195h Unknown VESA mode
0196h Unknown VESA mode
01A2h Unknown VESA mode
01A3h Unknown VESA mode
01A4h Unknown VESA mode
01A5h Unknown VESA mode
01A6h Unknown VESA mode
01B2h Unknown VESA mode
01B3h Unknown VESA mode
01B4h Unknown VESA mode
01B5h Unknown VESA mode
01B6h Unknown VESA mode
01C2h Unknown VESA mode
01C3h Unknown VESA mode
01C4h Unknown VESA mode
01C5h Unknown VESA mode
01C6h Unknown VESA mode
0100h Graphic 640 400 256
0183h Unknown VESA mode
0184h Unknown VESA mode
0185h Unknown VESA mode
0186h Unknown VESA mode
0101h Graphic 640 480 256
0110h Graphic 640 480 32K
0111h Graphic 640 480 64K
0112h Graphic 640 480 16M
0121h Unknown VESA mode
0103h Graphic 800 600 256
0113h Graphic 800 600 32K
0114h Graphic 800 600 64K
0115h Graphic 800 600 16M
0122h Unknown VESA mode
0105h Graphic 1024 768 256
0116h Graphic 1024 768 32K
0117h Graphic 1024 768 64K
0118h Graphic 1024 768 16M
0123h Unknown VESA mode
0107h Graphic 1280 1024 256
0119h Graphic 1280 1024 32K
011Ah Graphic 1280 1024 64K
011Bh Graphic 1280 1024 16M
0124h Unknown VESA mode
|
Monitor |
|---|
Monitor ================================================================================ Monitor Type : Analog color |
DMI |
|---|
Found SMBIOS Information via PnP Interface -------------------------------------------------------------------------------- Revision : 0.0 Number of structures : 31 Maximum structure size : A5h (165 decimal) bytes DMI Storage base : 000D8010h DMI Storage size : 0406h SMBIOS 2.31 Structure Table Entry Point Structure (at F000:68A0) -------------------------------------------------------------------------------- Anchor String : _SM_ Checksum : BDh Entry Point Structure Length : 1Fh bytes SMBIOS Revision : 2.F Maximum Structure Size : A5h (165 decimal) bytes Entry Point Revision : 0 Formated Area (5 bytes) : 0 0 0 0 0 DMI BIOS Structure Entry Point Structure (at F000h:68A0h) -------------------------------------------------------------------------------- Header : _DMI_ Checksum : A2h Length : 0406h (1030 decimal) bytes BIOS Structure Table Address : 000D8010h Number of Structures : 31 DMI BIOS Revision : 0.0 |
BIOS |
|---|
Structure : BIOS (Type 0) Length : 14h (20 decimal) bytes Handle : 0000h (0 decimal) ================================================================================ BIOS Vendor : TOSHIBA BIOS Version : V1.20 Starting Address Segment : E600h BIOS Release Date : 09/11/2002 BIOS ROM Size : 512K BIOS Characteristics: 7C219B80h 00000000h -------------------------------------------------------------------------------- ISA Supported : No MCA Supported : No EISA Supported : No PCI Supported : Yes PCMCIA Supported : Yes PnP Supported : Yes APM Supported : No Flashable BIOS : Yes BIOS shadowing : Yes VL-VESA Supported : No ESCD Supported : No CD-Boot Supported : Yes Selectable Boot Supported : Yes BIOS ROM Socketed : No Boot From PC Card Supported : No EDD Specification Supported : No NEC 9800 1.2mb Floppy Supported : No Toshiba 1.2mb Floppy Supported : Yes 5.25" / 360 KB Floppy Supported : No 5.25" / 1.2MB Floppy Supported : No 3.5" / 720 KB Floppy Supported : No 3.5" / 2.88 MB Floppy Supported : No Print Screen Supported : Yes 8042 Keyboard Supported : Yes Serial Services Supported : Yes Printer Services Supported : Yes CGA/Mono Video Supported : Yes NEC PC-98 : No BIOS Characteristics Extension Byte 1 (54h): -------------------------------------------------------------------------------- ACPI Supported : No USB Legacy Supported : No AGP Supported : Yes I2O Boot Supported : No LS-120 Boot Supported : Yes ATAPI ZIP Drive Boot Supported : No 1394 Boot Supported : Yes Smart Battery Supported : No BIOS Characteristics Extension Byte 2 (4Fh): -------------------------------------------------------------------------------- BIOS Boot Supported : Yes Network Boot Supported : Yes Dump of the structure (45 bytes): -------------------------------------------------------------------------------- 0000: 00 14 00 00 - 01 02 00 E6 "........" 0008: 03 07 80 9B - 21 7C 00 00 "....!|.." 0010: 00 00 87 01 - 54 4F 53 48 "....TOSH" 0018: 49 42 41 00 - 56 31 2E 32 "IBA.V1.2" 0020: 30 00 30 39 - 2F 31 31 2F "0.09/11/" 0028: 32 30 30 32 - 00 "2002." |
System |
|---|
Structure : System (Type 1) Length : 19h (25 decimal) bytes Handle : 0001h (1 decimal) ================================================================================ Manufacturer : TOSHIBA Product Name : Satellite 1115 Version : PS111U-001FUV Serial Number : Y2347996K UUID : 0000: E5 A6 CB CC - F0 4F 11 D6 ".....O.." 0008: 94 0C 00 02 - 3F 8B EB 9F "....?..." Wake-up Type : Power Switch Dump of the structure (164 bytes): -------------------------------------------------------------------------------- 0000: 01 19 01 00 - 01 02 03 04 "........" 0008: E5 A6 CB CC - F0 4F 11 D6 ".....O.." 0010: 94 0C 00 02 - 3F 8B EB 9F "....?..." 0018: 06 54 4F 53 - 48 49 42 41 ".TOSHIBA" 0020: 00 53 61 74 - 65 6C 6C 69 ".Satelli" 0028: 74 65 20 31 - 31 31 35 00 "te 1115." 0030: 50 53 31 31 - 31 55 2D 30 "PS111U-0" 0038: 30 31 46 55 - 56 00 59 32 "01FUV.Y2" 0040: 33 34 37 39 - 39 36 4B 00 "347996K." 0048: FF FF FF FF - FF FF FF FF "........" 0050: FF FF FF FF - FF FF FF FF "........" 0058: FF FF FF FF - FF FF FF FF "........" 0060: FF FF FF FF - FF FF FF FF "........" 0068: FF FF FF FF - FF FF FF FF "........" 0070: FF FF FF FF - FF FF FF FF "........" 0078: FF FF FF FF - FF FF FF FF "........" 0080: FF FF FF FF - FF FF FF FF "........" 0088: FF FF FF FF - FF FF FF FF "........" 0090: FF FF FF FF - FF FF FF FF "........" 0098: FF FF FF FF - FF FF FF FF "........" 00A0: FF FF FF 00 "...." |
Base Board |
|---|
Structure : Base Board (Type 2) Length : 08h (8 decimal) bytes Handle : 0002h (2 decimal) ================================================================================ Manufacturer : TOSHIBA Product : BTK20 Version : Null Serial Number : 0123456789AB Dump of the structure (40 bytes): -------------------------------------------------------------------------------- 0000: 02 08 02 00 - 01 02 03 04 "........" 0008: 54 4F 53 48 - 49 42 41 00 "TOSHIBA." 0010: 42 54 4B 32 - 30 00 4E 75 "BTK20.Nu" 0018: 6C 6C 00 30 - 31 32 33 34 "ll.01234" 0020: 35 36 37 38 - 39 41 42 00 "56789AB." |
System Enclosure or Chassis |
|---|
Structure : System Enclosure or Chassis (Type 3) Length : 11h (17 decimal) bytes Handle : 0003h (3 decimal) ================================================================================ Manufacturer : TOSHIBA Type : Notebook Chassis Lock : Not Present or Unknown Version : N/A Serial Number : None Asset Tag Number : No Asset Tag Bootup State : Safe Power Supply State : Safe Thermal State : Safe Security Status : None Dump of the structure (47 bytes): -------------------------------------------------------------------------------- 0000: 03 11 03 00 - 01 0A 02 03 "........" 0008: 04 03 03 03 - 03 34 12 00 ".....4.." 0010: 00 54 4F 53 - 48 49 42 41 ".TOSHIBA" 0018: 00 4E 2F 41 - 00 4E 6F 6E ".N/A.Non" 0020: 65 00 4E 6F - 20 41 73 73 "e.No Ass" 0028: 65 74 20 54 - 61 67 00 "et Tag." |
Processor |
|---|
Structure : Processor (Type 4) Length : 23h (35 decimal) bytes Handle : 0004h (4 decimal) ================================================================================ Socket Designation : U49 Processor Type : 03h (Central Processor) Processor Family : B2h (Reserved for specific Pentium versions) Processor Manufacturer : Intel Processor ID : 00000F27h BFEBF9FFh Processor Version : A0 External Clock : 0 MHz Max Speed : 1500 MHz Current Speed : 1500 MHz Status : 41h (CPU Socket Populated, Status Enabled) Processor Upgrade : 08h (Slot 1) Voltage : 1.8V L1 Cache Handle : 08 L2 Cache Handle : 09 L3 Cache Handle : 35 (no L3 handle) Serial Number : (none) Asset Tag : (none) Part Number : (none) Dump of the structure (48 bytes): -------------------------------------------------------------------------------- 0000: 04 23 04 00 - 01 03 B2 02 ".#......" 0008: 27 0F 00 00 - FF F9 EB BF "'......." 0010: 03 92 00 00 - DC 05 DC 05 "........" 0018: 41 08 08 00 - 09 00 FF FF "A......." 0020: 00 00 00 55 - 34 39 00 49 "...U49.I" 0028: 6E 74 65 6C - 00 41 30 00 "ntel.A0." |
Memory Controller |
|---|
Structure : Memory Controller (Type 5) Length : 14h (20 decimal) bytes Handle : 0005h (5 decimal) ================================================================================ Error Detecting Method : 03h (None) Error Correcting Capability : 04h (None) Supported Interleave : 03h (One Way Interleave) Current Interleave : 03h (One Way Interleave) Maximum Memory Module Size : 09h (512 MB ) Supported Speeds : 0001h (Other) Supported Memory Types : 0500h (DIMM, SDRAM) Memory Module Voltage : 02h (3.3V) Number of Associated Memory Slots : 02h Memory Module Configuration Handles : 06h 07h Enabled Error Correcting Capability : 04h (None) Dump of the structure (21 bytes): -------------------------------------------------------------------------------- 0000: 05 14 05 00 - 03 04 03 03 "........" 0008: 09 01 00 00 - 05 02 02 06 "........" 0010: 00 07 00 04 - 00 "....." |
Memory Module: JP18 |
|---|
Structure : Memory Module (Type 6) Length : 0Ch (12 decimal) bytes Handle : 0006h (6 decimal) ================================================================================ Socket Designation : JP18 Bank Connections : 01h (RAS 0, RAS 1) Current Speed : 7 Ns Current Memory Type : 0500h (DIMM, SDRAM) Installed Size : 88h (256 MB - Double Bank) Enabled Size : 88h (256 MB) Error Status : 00h (Errors: Cor-None; UnCor-None) Dump of the structure (17 bytes): -------------------------------------------------------------------------------- 0000: 06 0C 06 00 - 01 01 07 00 "........" 0008: 05 88 88 00 - 4A 50 31 38 "....JP18" 0010: 00 "." |
Memory Module: JP19 |
|---|
Structure : Memory Module (Type 6) Length : 0Ch (12 decimal) bytes Handle : 0007h (7 decimal) ================================================================================ Socket Designation : JP19 Bank Connections : 23h (RAS 2, RAS 3) Current Speed : 7 Ns Current Memory Type : 0500h (DIMM, SDRAM) Installed Size : 7Fh (Not Installed - Single Bank) Enabled Size : 7Fh (Not Installed) Error Status : 00h (Errors: Cor-None; UnCor-None) Dump of the structure (17 bytes): -------------------------------------------------------------------------------- 0000: 06 0C 07 00 - 01 23 07 00 ".....#.." 0008: 05 7F 7F 00 - 4A 50 31 39 "....JP19" 0010: 00 "." |
Cache: L1 Cache |
|---|
Structure : Cache (Type 7) Length : 13h (19 decimal) bytes Handle : 0008h (8 decimal) ================================================================================ Socket Designation : L1 Cache Cache Configuration : 0188h (L1; Socketed; Internal; Enabled; WB) Maximum Cache Size : 0020h (32 K) Installed Size : 0020h (32 K) Supported SRAM Type : 0078h (Burst, Pipeline Burst, Synchronous, Asynchronous) Current SRAM Type : 0040h (Asynchronous) Cache Speed : 0 Ns (unknown) Error Correcion Type : Unknown System Cache Type : Unknown Associativity : Unknown Dump of the structure (28 bytes): -------------------------------------------------------------------------------- 0000: 07 13 08 00 - 01 88 01 20 "....... " 0008: 00 20 00 78 - 00 40 00 00 ". .x.@.." 0010: 02 02 02 4C - 31 20 43 61 "...L1 Ca" 0018: 63 68 65 00 "che." |
Cache: L2 Cache |
|---|
Structure : Cache (Type 7) Length : 13h (19 decimal) bytes Handle : 0009h (9 decimal) ================================================================================ Socket Designation : L2 Cache Cache Configuration : 01A9h (L2; Socketed; External; Enabled; WB) Maximum Cache Size : 0100h (256 K) Installed Size : 0100h (256 K) Supported SRAM Type : 0058h (Burst, Pipeline Burst, Asynchronous) Current SRAM Type : 0008h (Burst) Cache Speed : 0 Ns (unknown) Error Correcion Type : Unknown System Cache Type : Unknown Associativity : Unknown Dump of the structure (28 bytes): -------------------------------------------------------------------------------- 0000: 07 13 09 00 - 01 A9 01 00 "........" 0008: 01 00 01 58 - 00 08 00 00 "...X...." 0010: 02 02 02 4C - 32 20 43 61 "...L2 Ca" 0018: 63 68 65 00 "che." |
Port Connector: Infrared |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 000Ah (10 decimal) ================================================================================ Internal Reference Designator : U1 Internal Connector Type : 00h (None) External Reference Designator : Infrared External Connector Type : 10h (Infrared) Port Type : 09h (Serial Port 16550A Compatible) Dump of the structure (21 bytes): -------------------------------------------------------------------------------- 0000: 08 09 0A 00 - 01 00 02 10 "........" 0008: 09 55 31 00 - 49 6E 66 72 ".U1.Infr" 0010: 61 72 65 64 - 00 "ared." |
Port Connector: Parallel |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 000Bh (11 decimal) ================================================================================ Internal Reference Designator : J40 Internal Connector Type : 19h (25 Pin Dual Inline (pin 26 cut)) External Reference Designator : Parallel External Connector Type : 05h (DB25 pin female) Port Type : 05h (Parallel Port ECP/EPP) Dump of the structure (22 bytes): -------------------------------------------------------------------------------- 0000: 08 09 0B 00 - 01 19 02 05 "........" 0008: 05 4A 34 30 - 00 50 61 72 ".J40.Par" 0010: 61 6C 6C 65 - 6C 00 "allel." |
Port Connector: SVGA-Out |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 000Ch (12 decimal) ================================================================================ Internal Reference Designator : JP3 Internal Connector Type : 00h (None) External Reference Designator : SVGA-Out External Connector Type : 07h (DB-15 pin female) Port Type : 1Ch (Video Port) Dump of the structure (22 bytes): -------------------------------------------------------------------------------- 0000: 08 09 0C 00 - 01 00 02 07 "........" 0008: 1C 4A 50 33 - 00 53 56 47 ".JP3.SVG" 0010: 41 2D 4F 75 - 74 00 "A-Out." |
Port Connector: USB |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 000Dh (13 decimal) ================================================================================ Internal Reference Designator : JP1/JP9 Internal Connector Type : 00h (None) External Reference Designator : USB External Connector Type : 12h (Access Bus) Port Type : 10h (USB) Dump of the structure (21 bytes): -------------------------------------------------------------------------------- 0000: 08 09 0D 00 - 01 00 02 12 "........" 0008: 10 4A 50 31 - 2F 4A 50 39 ".JP1/JP9" 0010: 00 55 53 42 - 00 ".USB." |
Port Connector: LINE_IN |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 000Eh (14 decimal) ================================================================================ Internal Reference Designator : JP20 Internal Connector Type : 00h (None) External Reference Designator : LINE_IN External Connector Type : 0Ah (RJ-11) Port Type : 0Bh (MIDI Port) Dump of the structure (22 bytes): -------------------------------------------------------------------------------- 0000: 08 09 0E 00 - 01 00 02 0A "........" 0008: 0B 4A 50 32 - 30 00 4C 49 ".JP20.LI" 0010: 4E 45 5F 49 - 4E 00 "NE_IN." |
Port Connector: MIC_IN |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 000Fh (15 decimal) ================================================================================ Internal Reference Designator : JP21 Internal Connector Type : 00h (None) External Reference Designator : MIC_IN External Connector Type : 0Ah (RJ-11) Port Type : 0Bh (MIDI Port) Dump of the structure (21 bytes): -------------------------------------------------------------------------------- 0000: 08 09 0F 00 - 01 00 02 0A "........" 0008: 0B 4A 50 32 - 31 00 4D 49 ".JP21.MI" 0010: 43 5F 49 4E - 00 "C_IN." |
Port Connector: HEADPHONE |
|---|
Structure : Port Connector (Type 8) Length : 09h (9 decimal) bytes Handle : 0010h (16 decimal) ================================================================================ Internal Reference Designator : JP23 Internal Connector Type : 00h (None) External Reference Designator : HEADPHONE External Connector Type : 0Ah (RJ-11) Port Type : 0Bh (MIDI Port) Dump of the structure (24 bytes): -------------------------------------------------------------------------------- 0000: 08 09 10 00 - 01 00 02 0A "........" 0008: 0B 4A 50 32 - 33 00 48 45 ".JP23.HE" 0010: 41 44 50 48 - 4F 4E 45 00 "ADPHONE." |
System Slot: OZ6933-1 |
|---|
Structure : System Slot (Type 9) Length : 0Dh (13 decimal) bytes Handle : 0011h (17 decimal) ================================================================================ Slot Designation : OZ6933-1 Slot Type : 07h (PC Card (PCMCIA)) Slot Data Bus Width : 05h (32 bit) Current Usage : 02h (Unknown) Slot Length : 01h (Other) Slot ID : 00h Slot Characteristics : 36h (Provides 5.0 Volts, Provides 3.3 Volts, PC Card-16, Cardbus) Slot Characteristics 2 : 02h (None) Dump of the structure (22 bytes): -------------------------------------------------------------------------------- 0000: 09 0D 11 00 - 01 07 05 02 "........" 0008: 01 00 00 36 - 02 4F 5A 36 "...6.OZ6" 0010: 39 33 33 2D - 31 00 "933-1." |
System Slot: OZ6933-2 |
|---|
Structure : System Slot (Type 9) Length : 0Dh (13 decimal) bytes Handle : 0012h (18 decimal) ================================================================================ Slot Designation : OZ6933-2 Slot Type : 07h (PC Card (PCMCIA)) Slot Data Bus Width : 05h (32 bit) Current Usage : 02h (Unknown) Slot Length : 01h (Other) Slot ID : 00h Slot Characteristics : 36h (Provides 5.0 Volts, Provides 3.3 Volts, PC Card-16, Cardbus) Slot Characteristics 2 : 02h (None) Dump of the structure (22 bytes): -------------------------------------------------------------------------------- 0000: 09 0D 12 00 - 01 07 05 02 "........" 0008: 01 00 00 36 - 02 4F 5A 36 "...6.OZ6" 0010: 39 33 33 2D - 32 00 "933-2." |
On Board Devices |
|---|
Structure : On Board Devices (Type 10) Length : 08h (8 decimal) bytes Handle : 0013h (19 decimal) ================================================================================ Device Type : 03h (Disabled, Video) Description String : ATI M6C Device Type : 07h (Disabled, Sound) Description String : Reltek ALC 202 Dump of the structure (31 bytes): -------------------------------------------------------------------------------- 0000: 0A 08 13 00 - 03 01 07 02 "........" 0008: 41 54 49 20 - 4D 36 43 00 "ATI M6C." 0010: 52 65 6C 74 - 65 6B 20 41 "Reltek A" 0018: 4C 43 20 32 - 30 32 00 "LC 202." |
OEM Strings |
|---|
Structure : OEM Strings (Type 11) Length : 05h (5 decimal) bytes Handle : 0014h (20 decimal) ================================================================================ Number of OEM Strings: 1244128 0) 'PS111U-001FUV,U001FUV001' Dump of the structure (68 bytes): -------------------------------------------------------------------------------- 0000: 0B 05 14 00 - 01 50 53 31 ".....PS1" 0008: 31 31 55 2D - 30 30 31 46 "11U-001F" 0010: 55 56 2C 55 - 30 30 31 46 "UV,U001F" 0018: 55 56 30 30 - 31 00 FF FF "UV001..." 0020: FF FF FF FF - FF FF FF FF "........" 0028: FF FF FF FF - FF FF FF FF "........" 0030: FF FF FF FF - FF FF FF FF "........" 0038: FF FF FF FF - FF FF FF FF "........" 0040: FF FF FF 00 "...." |
System Configuration |
|---|
Structure : System Configuration (Type 12) Length : 05h (5 decimal) bytes Handle : 0015h (21 decimal) ================================================================================ Number of System Configuration Options Strings: 0 Dump of the structure (6 bytes): -------------------------------------------------------------------------------- 0000: 0C 05 15 00 - 00 00 "......" |
Physical Memory Array |
|---|
Structure : Physical Memory Array (Type 16) Length : 0Fh (15 decimal) bytes Handle : 0016h (22 decimal) ================================================================================ Location : System board or motherboard Use : System memory Memory Error Correction : None Maximum Capacity : 524288 KB Memory Error Information Handle : FFFE Number of Memory Devices : 2 Dump of the structure (16 bytes): -------------------------------------------------------------------------------- 0000: 10 0F 16 00 - 03 03 03 00 "........" 0008: 00 08 00 FE - FF 02 00 00 "........" |
Memory Device: J6A |
|---|
Structure : Memory Device (Type 17) Length : 1Bh (27 decimal) bytes Handle : 0017h (23 decimal) ================================================================================ Memory Array Handle : 0016 Memory Error Information Handle : FFFF Total Width : 64bits Data Width : 64bits Size : 256MB Form Factor : SODIMM Device Set : 0001h Device Locator : J6A Bank Locator : SO DIMM 0 Memory Type : Error: Invalid Type Type Detail : 0080h Speed : UnknownManufacturer : (none) Serial Number : (none) Asset Tag : (none) Part Number : (none) Dump of the structure (41 bytes): -------------------------------------------------------------------------------- 0000: 11 1B 17 00 - 16 00 FF FF "........" 0008: 40 00 40 00 - 00 01 0D 01 "@.@....." 0010: 01 02 12 80 - 00 00 00 00 "........" 0018: 00 00 00 4A - 36 41 00 53 "...J6A.S" 0020: 4F 20 44 49 - 4D 4D 20 30 "O DIMM 0" 0028: 00 "." |
Memory Device: J7A |
|---|
Structure : Memory Device (Type 17) Length : 1Bh (27 decimal) bytes Handle : 0018h (24 decimal) ================================================================================ Memory Array Handle : 0016 Memory Error Information Handle : FFFF Total Width : 0bits Data Width : 0bits Size : 0MB (No Memory Device) Form Factor : SODIMM Device Set : 0001h Device Locator : J7A Bank Locator : SO DIMM 1 Memory Type : Error: Invalid Type Type Detail : 0080h Speed : UnknownManufacturer : (none) Serial Number : (none) Asset Tag : (none) Part Number : (none) Dump of the structure (41 bytes): -------------------------------------------------------------------------------- 0000: 11 1B 18 00 - 16 00 FF FF "........" 0008: 00 00 00 00 - 00 00 0D 01 "........" 0010: 01 02 12 80 - 00 00 00 00 "........" 0018: 00 00 00 4A - 37 41 00 53 "...J7A.S" 0020: 4F 20 44 49 - 4D 4D 20 31 "O DIMM 1" 0028: 00 "." |
Memory Array Mapped Address |
|---|
Structure : Memory Array Mapped Address (Type 19) Length : 0Fh (15 decimal) bytes Handle : 0019h (25 decimal) ================================================================================ Starting Address : 00000000h Ending Address : 0003FFFFh Memory Array Handle : 0016h Partition Width : 02h Dump of the structure (16 bytes): -------------------------------------------------------------------------------- 0000: 13 0F 19 00 - 00 00 00 00 "........" 0008: FF FF 03 00 - 16 00 02 00 "........" |
Memory Device Mapped Address |
|---|
Structure : Memory Device Mapped Address (Type 20) Length : 13h (19 decimal) bytes Handle : 001Ah (26 decimal) ================================================================================ Starting Address : 00000000h Ending Address : 0003FFFFh Memory Device Handle : 0017h Memory Array Mapped Address Handle : 0019h Partition Row Position : 02h Interleave Position : 00h Interleaved Data Depth : 00h Dump of the structure (20 bytes): -------------------------------------------------------------------------------- 0000: 14 13 1A 00 - 00 00 00 00 "........" 0008: FF FF 03 00 - 17 00 19 00 "........" 0010: 02 00 00 00 "...." |
Built-in Pointing Device |
|---|
Structure : Built-in Pointing Device (Type 21) Length : 07h (7 decimal) bytes Handle : 001Bh (27 decimal) ================================================================================ Type : 05h Interface : 04h Number of Buttons : 02h Dump of the structure (8 bytes): -------------------------------------------------------------------------------- 0000: 15 07 1B 00 - 05 04 02 00 "........" |
Portable Battery |
|---|
Structure : Portable Battery (Type 22) Length : 1Ah (26 decimal) bytes Handle : 001Ch (28 decimal) ================================================================================ Location : 1st Battery Manufacturer : PANASONIC Manufacture Date : 05/25/2001 Serial Number : 3658Q Device Name : PA3098U Device Chemistry : 06h Design Capacity : 3900 mWatt-hours Design Voltage : 14800 mVolts SBDS* Version Number : (none) Maximum Error in Battery Data : FFh SBDS* Serial Number : 0000h SBDS* Manufacture Date (M/D/Y): 00/00/1980 SBDS* Device Chemistry : (none) Design Capacity Multiplier : x1 OEM Specific : 00000000h * Smart Battery Data Specification Dump of the structure (74 bytes): -------------------------------------------------------------------------------- 0000: 16 1A 1C 00 - 01 02 03 04 "........" 0008: 05 06 3C 0F - D0 39 00 FF "..<..9.." 0010: 00 00 00 00 - 00 01 00 00 "........" 0018: 00 00 31 73 - 74 20 42 61 "..1st Ba" 0020: 74 74 65 72 - 79 00 50 41 "ttery.PA" 0028: 4E 41 53 4F - 4E 49 43 20 "NASONIC " 0030: 00 30 35 2F - 32 35 2F 32 ".05/25/2" 0038: 30 30 31 00 - 33 36 35 38 "001.3658" 0040: 51 00 50 41 - 33 30 39 38 "Q.PA3098" 0048: 55 00 "U." |
System Boot Information |
|---|
Structure : System Boot Information (Type 32)
Length : 14h (20 decimal) bytes
Handle : 001Dh (29 decimal)
================================================================================
Boot Status:
0) Unknown
1) No bootable media
2) The "normal" operating system failed to load
3) Firmware-detected hardware failure
4) Operating system-detected hardware failure
5) User-requested boot
6) System security violation
7) Previously-requested image
8) A system watchdog timer expired, causing the system to reboot
9) Unknown
Dump of the structure (21 bytes):
--------------------------------------------------------------------------------
0000: 20 14 1D 00 - 00 00 00 00 " ......."
0008: 00 00 0C 01 - 02 03 04 05 "........"
0010: 06 07 08 09 - 00 "....."
|
End-of-Table |
|---|
Structure : End-of-Table (Type 127) Length : 04h (4 decimal) bytes Handle : 001Eh (30 decimal) ================================================================================ Dump of the structure (5 bytes): -------------------------------------------------------------------------------- 0000: 7F 04 1E 00 - 00 "....." |
Hard disk(s) |
|---|
BIOS Reported 1 hard disk(s) ================================================================================ Alias Cylinders Heads Sectors Size(MB) -------------------------------------------------------------------------------- Hard disk 0 38760 16 63 19077.19 |
Hard disk 0 |
|---|
Hard Disk 0 Info Via INT 13
================================================================================
BIOS Number of Cylinders : 1024
BIOS Number of Heads : 255
BIOS Number of Sectors : 63
Hard Disk Capacity : 20003.88 MB (1KB = 1000 bytes)
: 19077.19 MB (1KB = 1024 bytes)
(From INT 13 Extension BIOS)
Notes:
1. Warning: BIOS Parameters May Be Unreliable
Due To Limitations of PC Architecture.
2. Historically, Hard Disk Manufacturers Calculating
Volume Make 1KB Equal 1000 Bytes.
INT 13h Fixed Disk Extensions Present.
Major Version : 30h
Extended Drive Parameter Table
--------------------------------------------------------------------------------
Total Number of Addressable Cylinders : 16383
Total Number of Addressable Heads : 16
Number of Sectors Per Track : 63
Total Number of Addressable Sectors : 039070080
Number of Bytes Per Sector : 512
Information Flags : 1
--------------------------------------------------------------------------------
DMA Boundary Errors Are Automatically Avoided By EBIOS
|
Memory |
|---|
Memory ================================================================================ Size : 261568 KB (255 MB) System Memory Map Reported by BIOS via INT 0x15 Function 0xE820 --------------------------------------------------------------- Base Address | Length | Type --------------------------------------------------------------- 00000000h 0009F800h ( 638 KB) 01 (Memory, available to OS) 0009F800h 00000800h ( 2 KB) 02 (Reserved, not available) 000D8000h 00008000h ( 32 KB) 02 (Reserved, not available) 000E4000h 0001C000h ( 112 KB) 02 (Reserved, not available) 00100000h 0FDF0000h ( 253.9 MB) 01 (Memory, available to OS) 0FEF0000h 0000C000h ( 48 KB) 03 (ACPI Reclaim Memory (usable by OS after reading ACPI tables)) 0FEFC000h 00004000h ( 16 KB) 04 (ACPI NVS Memory (OS is required to save this memory between NVS sessions)) 0FF00000h 00080000h ( 512 KB) 01 (Memory, available to OS) 0FF80000h 00080000h ( 512 KB) 02 (Reserved, not available) FFB80000h 00080000h ( 512 KB) 02 (Reserved, not available) Memory module information reported by DMI: ----------------------------------------------------------------- Socket Speed Size Enabled Type ----------------------------------------------------------------- |
Serial Ports |
|---|
Serial Ports are Absent |
Sound |
|---|
Audio Device(s) Found : ================================================================================ 1. PCI card 2. PC Speaker |
PCI card |
|---|
PCI card ================================================================================ Location : PCI Device on Motherboard Vendor Id : 8086h (Intel) Device Id : 2485h (PCI card) Class : 01h (Audio Device) Sub Vendor Id : 1179h (Toshiba America Info Systems) Sub Device Id : FF00h (info unavailable) |
Option ROM(s) |
|---|
Option ROM(s) Found: 4 ================================================================================ Option ROM at C0000h - ATI Technologies Option ROM at CE000h - Realtek Semiconductor RT8139 Fast Ethernet Adapter Option ROM at D8000h Option ROM at DC000h |
Option ROM at C0000h |
|---|
Option ROM ================================================================================ Location : C0000h Length : 57344 bytes (56.0 kB) Boot initialization vector : E9 D5 04 00 (JMP C04DBh) Entry point of boot procedure : C04DBh Offset of PCI DATA structure : 0180h (valid) PCI Expansion ROM Image Data Structure at C0180h -------------------------------------------------------------------------------- PCI data structure signature : PCIR PCI device vendor ID : 1002 (ATI Technologies) PCI device ID : 4C59 (Unknown) Length of PCI data structure : 24 bytes Structure revision : 0.0 PCI device class : 03 00 00 (VGA Compatible Controller) Length of PCI expansion ROM : 57344 bytes (56.0 kB) Code/Data revision level : 7.2 Device is Intel x86 compliant : Yes Option ROM first 256 bytes dump -------------------------------------------------------------------------------- 0000: 55 AA 70 E9 - D5 04 00 00 - 00 00 00 00 "U.p........." 000C: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 0018: 80 01 00 00 - 00 00 49 42 - 4D C8 00 00 "......IBM..." 0024: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 0030: 20 37 36 31 - 32 39 35 35 - 32 30 00 00 " 761295520.." 003C: 00 00 00 00 - 3F 3F 00 00 - 00 00 00 00 "....??......" 0048: 1E 01 00 00 - 00 00 00 00 - 32 30 30 32 "........2002" 0054: 2F 30 37 2F - 32 36 20 31 - 31 3A 31 30 "/07/26 11:10" 0060: 00 00 00 00 - E9 D8 10 00 - E9 CA 1B 00 "............" 006C: 00 00 00 00 - 47 BF 8E 00 - 02 10 0A 01 "....G......." 0078: 00 00 00 00 - 00 00 00 00 - 0D 0A 4D 36 "..........M6" 0084: 2D 43 20 42 - 69 6F 73 20 - 56 65 72 73 "-C Bios Vers" 0090: 69 6F 6E 20 - 3A 30 2E 32 - 20 66 6F 72 "ion :0.2 for" 009C: 20 43 6F 6D - 70 61 6C 5C - 42 54 4B 32 " Compal\BTK2" 00A8: 30 0D 0A 00 - 28 43 29 20 - 31 39 38 38 "0...(C) 1988" 00B4: 2D 32 30 30 - 31 2C 20 41 - 54 49 20 54 "-2001, ATI T" 00C0: 65 63 68 6E - 6F 6C 6F 67 - 69 65 73 20 "echnologies " 00CC: 49 6E 63 2E - 20 42 4B 35 - 2E 30 2E 30 "Inc. BK5.0.0" 00D8: 20 56 52 30 - 30 30 2E 30 - 30 30 2E 30 " VR000.000.0" 00E4: 30 37 2E 30 - 30 32 2E 30 - 30 32 2E 30 "07.002.002.0" 00F0: 30 30 2E 30 - 30 31 2E 30 - 30 31 20 6C "00.001.001 l" 00FC: 78 63 6D 70 "xcmp" |
Option ROM at CE000h |
|---|
Option ROM ================================================================================ Location : CE000h Length : 4096 bytes (4.0 kB) Boot initialization vector : E8 31 1E CB (invalid) Entry point of boot procedure : None Offset of PCI DATA structure : 0040h (valid) Offset of Expansion Header : 0060h (valid) PCI Expansion ROM Image Data Structure at CE040h -------------------------------------------------------------------------------- PCI data structure signature : PCIR PCI device vendor ID : 10EC (Realtek Semiconductor) PCI device ID : 8139 (RT8139 Fast Ethernet Adapter) Length of PCI data structure : 24 bytes Structure revision : 0.0 PCI device class : 02 00 00 (Ethernet Controller) Length of PCI expansion ROM : 4096 bytes (4.0 kB) Code/Data revision level : 2.1 Device is Intel x86 compliant : Yes PnP Expansion ROM Header at CE060h -------------------------------------------------------------------------------- Signature : $n Structure revision : 0.1 Length (in 16 byte increments) : 2 (32 bytes) Offset of next header : 0000h (None) Checksum : D5h (Valid) Device Identifier : @@@0000 Offset of Manufacturer String : 00AFh (Intel Corporation) Offset of Product Name : 0134h (Realtek Boot Agent) Device class code : 00 00 02 (Unknown PCI Device) Boot connection vector (BCV) : 0000h (None) Disconnect vector (DV) : 0000h (None) Bootstrap entry vector (BEV) : 0000h (None) Static resource info vector : 0000h (None) Device Indicators ----------------- It's a display device : No It's an input device : No It's an IPL device : No ROM is required only at boot : Yes ROM is read cacheable : No ROM may be shadowed in RAM : No DDI model supported : No Option ROM first 256 bytes dump -------------------------------------------------------------------------------- 0000: 55 AA 08 E8 - 31 1E CB D7 - 39 03 00 00 "U...1...9..." 000C: 00 00 00 00 - 00 00 00 00 - 00 00 20 00 ".......... ." 0018: 40 00 60 00 - 2E 8B C0 90 - 55 4E 44 49 "@.`.....UNDI" 0024: 16 24 00 00 - 01 02 89 0C - 00 08 30 5A ".$........0Z" 0030: 2B 13 50 43 - 49 52 2E 8B - C0 2E 8B C0 "+.PCIR......" 003C: 2E 8B C0 90 - 50 43 49 52 - EC 10 39 81 "....PCIR..9." 0048: 00 00 18 00 - 00 00 00 02 - 08 00 01 02 "............" 0054: 00 80 00 00 - 2E 8B C0 2E - 8B C0 8B C0 "............" 0060: 24 50 6E 50 - 01 02 00 00 - 00 D5 00 00 "$PnP........" 006C: 00 00 AF 00 - 34 01 00 00 - 02 10 00 00 "....4......." 0078: 00 00 00 00 - 00 00 00 00 - 0D 0A 43 6F "..........Co" 0084: 70 79 72 69 - 67 68 74 20 - 28 43 29 20 "pyright (C) " 0090: 31 39 39 37 - 2D 32 30 30 - 30 20 20 49 "1997-2000 I" 009C: 6E 74 65 6C - 20 43 6F 72 - 70 6F 72 61 "ntel Corpora" 00A8: 74 69 6F 6E - 0D 0A 00 49 - 6E 74 65 6C "tion...Intel" 00B4: 20 43 6F 72 - 70 6F 72 61 - 74 69 6F 6E " Corporation" 00C0: 00 49 6E 74 - 65 6C 20 55 - 4E 44 49 2C ".Intel UNDI," 00CC: 20 50 58 45 - 2D 32 2E 30 - 20 28 62 75 " PXE-2.0 (bu" 00D8: 69 6C 64 20 - 30 38 32 29 - 00 0D 0A 46 "ild 082)...F" 00E4: 6F 72 20 52 - 65 61 6C 74 - 65 6B 20 52 "or Realtek R" 00F0: 54 4C 38 31 - 33 39 28 41 - 2F 42 2F 43 "TL8139(A/B/C" 00FC: 29 2F 52 54 ")/RT" |
Option ROM at D8000h |
|---|
Option ROM ================================================================================ Location : D8000h Length : 16384 bytes (16.0 kB) Boot initialization vector : CB 00 00 00 (invalid) Entry point of boot procedure : None Offset of PCI DATA structure : 0703h (invalid) Offset of Expansion Header : 9B80h (invalid) Option ROM first 256 bytes dump -------------------------------------------------------------------------------- 0000: 55 AA 20 CB - 00 00 00 00 - 00 00 00 00 "U. ........." 000C: 00 00 00 00 - 00 14 00 00 - 01 02 00 E6 "............" 0018: 03 07 80 9B - 21 7C 00 00 - 00 00 87 01 "....!|......" 0024: 54 4F 53 48 - 49 42 41 00 - 56 31 2E 32 "TOSHIBA.V1.2" 0030: 30 00 30 39 - 2F 31 31 2F - 32 30 30 32 "0.09/11/2002" 003C: 00 00 01 19 - 01 00 01 02 - 03 04 E5 A6 "............" 0048: CB CC F0 4F - 11 D6 94 0C - 00 02 3F 8B "...O......?." 0054: EB 9F 06 54 - 4F 53 48 49 - 42 41 00 53 "...TOSHIBA.S" 0060: 61 74 65 6C - 6C 69 74 65 - 20 31 31 31 "atellite 111" 006C: 35 00 50 53 - 31 31 31 55 - 2D 30 30 31 "5.PS111U-001" 0078: 46 55 56 00 - 59 32 33 34 - 37 39 39 36 "FUV.Y2347996" 0084: 4B 00 FF FF - FF FF FF FF - FF FF FF FF "K..........." 0090: FF FF FF FF - FF FF FF FF - FF FF FF FF "............" 009C: FF FF FF FF - FF FF FF FF - FF FF FF FF "............" 00A8: FF FF FF FF - FF FF FF FF - FF FF FF FF "............" 00B4: FF FF FF FF - FF FF FF FF - FF FF FF FF "............" 00C0: FF FF FF FF - FF FF FF FF - FF FF FF FF "............" 00CC: FF FF FF FF - FF FF FF FF - FF FF FF FF "............" 00D8: FF FF FF FF - FF FF FF FF - FF 00 00 02 "............" 00E4: 08 02 00 01 - 02 03 04 54 - 4F 53 48 49 ".......TOSHI" 00F0: 42 41 00 42 - 54 4B 32 30 - 00 4E 75 6C "BA.BTK20.Nul" 00FC: 6C 00 30 31 "l.01" |
Option ROM at DC000h |
|---|
Option ROM ================================================================================ Location : DC000h Length : 16384 bytes (16.0 kB) Boot initialization vector : CB 00 00 00 (invalid) Entry point of boot procedure : None Option ROM first 256 bytes dump -------------------------------------------------------------------------------- 0000: 55 AA 20 CB - 00 00 00 00 - 00 00 00 00 "U. ........." 000C: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 0018: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 0024: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 0030: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 003C: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 0048: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 0054: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 0060: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 006C: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 0078: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 0084: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 0090: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 009C: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 00A8: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 00B4: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 00C0: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 00CC: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 00D8: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 00E4: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 00F0: 00 00 00 00 - 00 00 00 00 - 00 00 00 00 "............" 00FC: 00 00 00 00 "...." |
Modems |
|---|
Modem(s) Found: ================================================================================ 1. PCI Modem |
PCI Modem |
|---|
PCI Modem ================================================================================ Vendor Id : 8086h (Intel) Device Id : 2486h (PCI Modem) Class : 03h (Generic modem) Sub Vendor Id : 1179h (Toshiba America Info Systems) Sub Device Id : 0001h (info unavailable) Location : PCI Device on Motherboard |
Mice |
|---|
Mouse Found : 1 ================================================================================ 1. PS/2 Mouse |
PS/2 Mouse |
|---|
PS/2 Mouse ================================================================================ Mouse Type : PS/2 Mouse Mouse Name : Microsoft Compatible Mouse IRQ Channel : 12 |
Parallel Ports |
|---|
List of Detected Parallel Ports ================================================================================ Port Type Base IRQ DMA Name Notes -------------------------------------------------------------------------------- Standard 0378H 7 - LPT1 Motherboard integrated Dump of BIOS Data Area at 0040:0008H -------------------------------------------------------------------------------- 00400008 |
LPT1 |
|---|
PnP Parallel Port at I/O Address 0378H ================================================================================ Location : Motherboard BIOS Name : LPT1 Device Name : Standard LPT printer port IRQ Channel : 7 Current Port Mode : Standard Parallel Port Mode List of Supported Modes -------------------------------------------------------------------------------- Standard Parallel Port Mode Bi-Directional (PS/2 Port) Mode Nibble Mode |
Y2K Compliance |
|---|
ISA Bus |
|---|
ISA (Interconnect Standard Architecture) ================================================================================ Number of I/O address lines : 16 I/O space size : 64 Kb Note: ISA bus speed is limited to 8.33 Mhz |
MPEG |
|---|
No MPEG Device Found or MPEG Device is not Configured |
PC Speaker |
|---|
PC Speaker ================================================================================ I/O address : 0061H |
Adaptec AHA-154x compatible adapter |
|---|
Legacy ISA SCSI Adapter
================================================================================
Location : ISA Extension Card
Card Type : Adaptec AHA-154x compatible adapter
SCSI ID : 0
Base address : 0003h
================================================================================
SCSI Device(s) Found: 2
================================================================================
Features:
1. Wide SCSI-2 interface
2. High performance Bus Master DMA with selectable
or programmable data rates of up to 10 MBytes/sec
3. 16- or 8-bit host bus data transfer widths
4. True multithreaded operation supporting up to 255 tasks simultaneously
5. Programmable mailbox architecture
|
PCI SCSI Adapter |
|---|
PCI SCSI Adapter ================================================================================ |
PCI SCSI Adapter |
|---|
PCI SCSI Adapter ================================================================================ |
Cache |
|---|
No Cache Levels Found |
Resource Maps |
|---|
IRQ map |
|---|
IRQ map ================================================================================ IRQ PIC Status Used by -------------------------------------------------------------------------------- 00 not masked AT Timer 01 not masked IBM Enhanced keyboard controller (101/2-key) 02 not masked AT Interrupt Controller 03 masked Not used 04 masked Not used 05 masked Not used 06 not masked PC standard floppy disk controller 07 masked Standard LPT printer port 08 masked AT Real-Time Clock 09 masked Not used 10 masked Not used 11 masked Not used 12 not masked PS/2 Port for PS/2-style Mice 13 not masked Math Coprocessor 14 not masked Not used 15 not masked Not used |
DMA map |
|---|
DMA map ================================================================================ Channel Width Type Used by -------------------------------------------------------------------------------- 00 8 bit Normal Not used 01 8 bit Normal Not used 02 8 bit Normal PC standard floppy disk controller 03 8 bit Normal Not used 04 16 bit Normal AT DMA Controller |
Memory map |
|---|
Memory map ================================================================================ Base Limit Length Device -------------------------------------------------------------------------------- 00000000h 0009FFFFh 640 KB System Board 000C0000h 000CDFFFh 56 KB Option ROM at C0000h 000CE000h 000CEFFFh 4 KB Option ROM at CE000h 000CF000h 000CFFFFh 4 KB Motherboard registers 000D8000h 000DBFFFh 16 KB Motherboard registers 000DC000h 000DFFFFh 16 KB Motherboard registers 000E4000h 000FFFFFh 112 KB System Board 00100000h 0FDFFFFFh 253 MB System Board FF000000h FF07FFFFh 512 KB INT0800 FF800000h FF87FFFFh 512 KB INT0800 FF880000h FF8FFFFFh 512 KB INT0800 FF900000h FF97FFFFh 512 KB INT0800 FF980000h FF9FFFFFh 512 KB INT0800 FFA00000h FFA7FFFFh 512 KB INT0800 FFA80000h FFAFFFFFh 512 KB INT0800 FFB00000h FFB7FFFFh 512 KB INT0800 FFB80000h FFBFFFFFh 512 KB INT0800 FFF00000h FFFFFFFFh 1 MB Motherboard registers |
I/O map |
|---|
I/O map ================================================================================ +-----------------------------------------------+ | Attention! | | You can run the I/O ISA address space scan to | | update I/O map with the hidden motherboard | | I/O resources and the I/O ranges assigned to | | the unrecognized legacy ISA cards | +-----------------------------------------------+ Base Limit Length Device -------------------------------------------------------------------------------- 0000h 000Fh 16 AT DMA Controller 0003h 0005h 3 Adaptec AHA-154x compatible adapter 0010h 001Fh 16 Motherboard registers 0020h 0021h 2 AT Interrupt Controller 0024h 0025h 2 Motherboard registers 0028h 0029h 2 Motherboard registers 002Ch 002Dh 2 Motherboard registers 0030h 0031h 2 Motherboard registers 0034h 0035h 2 Motherboard registers 0038h 0039h 2 Motherboard registers 003Ch 003Dh 2 Motherboard registers 0040h 0043h 4 AT Timer 0050h 0053h 4 Motherboard registers 0060h 0060h 1 IBM Enhanced keyboard controller (101/2-key) 0061h 0061h 1 AT standard speaker sound 0064h 0064h 1 IBM Enhanced keyboard controller (101/2-key) 0070h 0071h 2 AT Real-Time Clock 0072h 0073h 2 Motherboard registers 0074h 0075h 2 Motherboard registers 0076h 0077h 2 Motherboard registers 0080h 0080h 1 Motherboard registers 0081h 008Fh 15 AT DMA Controller 0090h 0091h 2 Motherboard registers 0092h 0092h 1 Motherboard registers 0093h 009Fh 13 Motherboard registers 00A0h 00A1h 2 AT Interrupt Controller 00A4h 00A5h 2 Motherboard registers 00A8h 00A9h 2 Motherboard registers 00ACh 00ADh 2 Motherboard registers 00B0h 00B1h 2 Motherboard registers 00B2h 00B3h 2 Motherboard registers 00B4h 00B5h 2 Motherboard registers 00B8h 00B9h 2 Motherboard registers 00BCh 00BDh 2 Motherboard registers 00C0h 00DFh 32 AT DMA Controller 00F0h 00FFh 16 Math Coprocessor 0279h 0279h 1 PnP ISA ADDRESS port 0378h 037Fh 8 Standard LPT printer port 03E0h 03E1h 2 Intel PCIC 82365SL C step 03F0h 03F5h 6 PC standard floppy disk controller 03F7h 03F7h 1 PC standard floppy disk controller 04D0h 04D1h 2 Motherboard registers 0A79h 0A79h 1 PnP ISA WRITE_DATA port 0CF8h 0CFFh 8 PCI Bus 1000h 105Fh 96 Motherboard registers 1060h 107Fh 32 Motherboard registers 1180h 11BFh 64 Motherboard registers |